Butted SOI junction isolation structures and devices and method of fabrication
First Claim
1. A method, comprising:
- providing a silicon layer on a buried oxide layer of a silicon-on-insulator substrate;
forming a first gate electrode of a first field effect transistor on a top surface of a gate dielectric layer formed on a top surface of said silicon layer and forming a second gate of a second field effect transistor on said top surface of said gate dielectric layer;
etching a trench in said silicon layer between said first and second gate electrodes, said trench extending from a top surface of said silicon layer into said silicon layer, said trench not extending to said buried oxide layer;
ion implanting a dopant species into said silicon layer under a bottom of said trench to form a first doped region in said silicon layer, said first doped region doped to a first concentration;
performing a first epitaxial deposition to form a first epitaxial layer doped to a second concentration in said bottom of said trench, said first epitaxial layer partially filling said trench;
performing a second epitaxial deposition to form a second epitaxial layer doped to a third concentration on said first epitaxial layer in said trench; and
wherein said third concentration is greater than said first and second concentrations and said first concentration is greater than said second concentration.
7 Assignments
0 Petitions
Accused Products
Abstract
A structure, a FET, a method of making the structure and of making the FET. The structure including: a silicon layer on a buried oxide (BOX) layer of a silicon-on-insulator substrate; a trench in the silicon layer extending from a top surface of the silicon layer into the silicon layer, the trench not extending to the BOX layer, a doped region in the silicon layer between and abutting the BOX layer and a bottom of the trench, the first doped region doped to a first dopant concentration; a first epitaxial layer, doped to a second dopant concentration, in a bottom of the trench; a second epitaxial layer, doped to a third dopant concentration, on the first epitaxial layer in the trench; and wherein the third dopant concentration is greater than the first and second dopant concentrations and the first dopant concentration is greater than the second dopant concentration.
12 Citations
22 Claims
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1. A method, comprising:
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providing a silicon layer on a buried oxide layer of a silicon-on-insulator substrate; forming a first gate electrode of a first field effect transistor on a top surface of a gate dielectric layer formed on a top surface of said silicon layer and forming a second gate of a second field effect transistor on said top surface of said gate dielectric layer; etching a trench in said silicon layer between said first and second gate electrodes, said trench extending from a top surface of said silicon layer into said silicon layer, said trench not extending to said buried oxide layer; ion implanting a dopant species into said silicon layer under a bottom of said trench to form a first doped region in said silicon layer, said first doped region doped to a first concentration; performing a first epitaxial deposition to form a first epitaxial layer doped to a second concentration in said bottom of said trench, said first epitaxial layer partially filling said trench; performing a second epitaxial deposition to form a second epitaxial layer doped to a third concentration on said first epitaxial layer in said trench; and wherein said third concentration is greater than said first and second concentrations and said first concentration is greater than said second concentration. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22)
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Specification