Array substrate for liquid crystal display device and method of fabricating the same
First Claim
1. An array substrate for a liquid crystal display device, comprising:
- a gate line on a substrate including a pixel region;
a gate electrode connected to the gate line;
a gate insulating layer on the gate line and the gate electrode and including a gate opening, the gate opening exposing a top surface of the substrate, wherein the gate insulating layer in a first portion of the pixel region is removed to form the gate opening, and the gate insulating layer in a second portion of the pixel region covers the substrate;
an active layer on the gate insulating layer and overlapping the gate electrode;
an ohmic contact layer on the active layer;
a source electrode on the ohmic contact layer;
a drain electrode on the ohmic contact layer and spaced apart from the source electrode, wherein one end of the drain electrode is disposed in the gate opening and contacts the top surface of the substrate;
a data line on the gate insulating layer and connected to the source electrode, the data line crossing the gate line to define the pixel region;
a passivation layer on the data line and the source and drain electrodes and including a pixel opening, wherein the pixel opening exposes the drain electrode in the gate opening and a portion of the gate insulating layer; and
a pixel electrode disposed in the pixel opening and the pixel region such that the pixel electrode contacts a top surface of the gate insulating layer in the second portion of the pixel region, the pixel electrode contacting the one end of the drain electrode in the gate opening.
1 Assignment
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Accused Products
Abstract
An array substrate for a liquid crystal display device includes a gate line on a substrate; a gate electrode connected to the gate line; a gate insulating layer on the gate line and the gate electrode and including a gate opening; an active layer on the gate insulating layer and overlapping the gate electrode; an ohmic contact layer on the active layer; a source electrode on the ohmic contact layer; a drain electrode on the ohmic contact layer and spaced apart from the source electrode, wherein one end of the drain electrode is disposed in the gate opening; a data line on the gate insulating layer and connected to the source electrode, the data line crossing the gate line; a passivation layer on the data line and the source and drain electrodes and including a pixel opening, wherein the pixel opening exposes the drain electrode in the gate opening and a portion of the gate insulating layer; and a pixel electrode on the gate insulating layer and in the pixel opening, the pixel electrode contacting the one end of the drain electrode in the gate opening.
4 Citations
16 Claims
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1. An array substrate for a liquid crystal display device, comprising:
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a gate line on a substrate including a pixel region; a gate electrode connected to the gate line; a gate insulating layer on the gate line and the gate electrode and including a gate opening, the gate opening exposing a top surface of the substrate, wherein the gate insulating layer in a first portion of the pixel region is removed to form the gate opening, and the gate insulating layer in a second portion of the pixel region covers the substrate; an active layer on the gate insulating layer and overlapping the gate electrode; an ohmic contact layer on the active layer; a source electrode on the ohmic contact layer; a drain electrode on the ohmic contact layer and spaced apart from the source electrode, wherein one end of the drain electrode is disposed in the gate opening and contacts the top surface of the substrate; a data line on the gate insulating layer and connected to the source electrode, the data line crossing the gate line to define the pixel region; a passivation layer on the data line and the source and drain electrodes and including a pixel opening, wherein the pixel opening exposes the drain electrode in the gate opening and a portion of the gate insulating layer; and a pixel electrode disposed in the pixel opening and the pixel region such that the pixel electrode contacts a top surface of the gate insulating layer in the second portion of the pixel region, the pixel electrode contacting the one end of the drain electrode in the gate opening. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method of fabricating an array substrate for a liquid crystal display device, comprising:
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forming a gate line and a gate electrode on a substrate including a pixel region, the gate electrode connected to the gate line; forming a gate insulating layer on the gate line and the gate electrode, an active layer on the gate insulating layer, and an impurity-doped amorphous silicon pattern on the active layer, wherein the gate insulating layer in a first portion of the pixel region is removed to have a gate opening for exposing a top surface of the substrate, and the active layer overlaps the gate electrode, and wherein the gate insulating layer in a second portion of the pixel region covers the substrate; forming a data line on the gate insulating layer and crossing the gate line to define the pixel region, and source and drain electrodes on the impurity-doped amorphous silicon layer, the data line connected to the source electrode and crossing the gate line, the drain electrode spaced apart from the source electrode, wherein one end of the drain electrode is disposed in the gate opening and contacts the top surface of the substrate; etching a portion of the impurity-doped amorphous silicon layer exposed a space between the source and drain electrodes to expose a portion of the active layer; and forming a passivation layer, which is disposed on the data line and the source and drain electrodes and including a pixel opening, and a pixel electrode in the pixel opening, wherein the pixel opening exposes the drain electrode in the gate opening and a portion of the gate insulating layer in the second portion of the pixel region such that the pixel electrode contacts the drain electrode in the gate opening and a top surface of the gate insulating layer in the second portion of the pixel region. - View Dependent Claims (8, 9, 10, 11, 12, 13, 14, 15, 16)
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Specification