Computer system and method for resetting the same

• US 8,769,252 B2
• Filed: 08/31/2011
• Issued: 07/01/2014
• Est. Priority Date: 06/01/2011
• Status: Active Grant

• Current Assignee: Wistron Corporation
• Original Assignee: Wistron Corporation
• Inventors: Lin, Wei-Chih
• Primary Examiner(s): YANCHUS III, PAUL B
• Application Number:
  US13/221,933
• Publication Number:
  US 20120311310A1
• Time in Patent Office: 1,035 Days
• Field of Search: None
• US Class Current: 713/1
• CPC Class Codes: G06F 11/0757 by exceeding a time limit, i.e. time-out, e.g. watchdogs
• CPC Class Codes: G06F 11/0793 Remedial or corrective actions recovery from an exception in an instruction pipeline G06F9/3861; by retry G06F11/1402; for recovering from a failure of a protocol instance or entity H04L69/40

Abstract

A computer system and a method for resetting the same are provided. The computer system includes a basic input output system (BIOS) chip and a keyboard controller. In the method, the BIOS chip monitors the keyboard controller to determine whether a time that the keyboard controller remains in a hang up state reaches an idle time limit. Besides, the keyboard controller monitors the BIOS chip to determine whether a time that the BIOS chip remains in the hang up state reaches the idle time limit When it is determined that the time of one of the BIOS chip and the keyboard controller remaining in the hang up state reaches the idle time limit, the computer system is reset in accordance with a hardware reset signal trigger by the other one of the BIOS chip and the keyboard controller.

Claims

1. A method for resetting a computer system, the computer system comprising a basic input output system (BIOS) chip and a keyboard controller, and the method for resetting the computer system comprising:

monitoring the keyboard controller by the BIOS chip to determine whether a time that the keyboard controller remains in a hang up state reaches an idle time limit;

monitoring the BIOS chip by the keyboard controller to determine whether a time that the BIOS chip remains in the hang up state reaches the idle time limit; and

when it is determined that the time of one of the BIOS chip and the keyboard controller remaining in the hang up state reaches the idle time limit, triggering a hardware reset signal by the other one of the BIOS chip and the keyboard controller to reset the computer system.

2. The method for resetting the computer system as claimed in claim 1, wherein the step of monitoring the keyboard controller by the BIOS chip to determine whether the time that the keyboard controller remains in the hang up state reaches the idle time limit comprises:

reading a first specific address of an internal memory of the keyboard controller by the BIOS chip every a first time interval;

determining by the BIOS chip whether a buffer status flag is opportunely set to a specific value;

if not, accumulating a keyboard controller error count value by the BIOS chip;

if yes, zeroizing the keyboard controller error count value by the BIOS chip; and

repeating the above steps by the BIOS chip, and determining that the time that the keyboard controller remains in the hang up state reaches the idle time limit when the keyboard controller error count value is greater than a first value, wherein a product of the first time interval and the first value is smaller than or equal to the idle time limit.

3. The method for resetting the computer system as claimed in claim 2, wherein after the step of zeroizing the keyboard controller error count value by the BIOS chip, the method for resetting the computer system further comprises:

zeroizing a BIOS chip error count value recorded in a second specific address of the internal memory by the BIOS chip.

4. The method for resetting the computer system as claimed in claim 3, wherein the step of monitoring the BIOS chip by the keyboard controller to determine whether the time that the BIOS chip remains in the hang up state reaches the idle time limit comprises:

reading and accumulating the BIOS chip error count value by the keyboard controller every a second time interval; and

repeating the above step by the keyboard controller, and determining the time that the BIOS chip remains in the hang up state reaches the idle time limit when the BIOS chip error count value is greater than a second value, wherein a product of the second time interval and the second value is smaller than or equal to the idle time limit.

5. The method for resetting the computer system as claimed in claim 4, further comprising:

sending an interrupt signal to the BIOS chip by the keyboard controller every a third time interval, wherein the third time interval is smaller than the idle time limit; and

zeroizing the keyboard controller error count value by the BIOS chip after receiving the interrupt signal.

6. A computer system, comprising:

a power management circuit, managing a power of the computer system;

a basic input output system (BIOS) chip, coupled to the power management circuit; and

a keyboard controller, coupled to the power management circuit and the BIOS chip,

wherein the BIOS chip monitors the keyboard controller to determine whether a time that the keyboard controller remains in a hang up state reaches an idle time limit, and the keyboard controller monitors the BIOS chip to determine whether a time that the BIOS chip remains in the hang up state reaches the idle time limit, when it is determined that the time of one of the BIOS chip and the keyboard controller remaining in the hang up state reaches the idle time limit, the other one of the BIOS chip and the keyboard controller sends a hardware reset signal to the power management circuit to control the power management circuit to turn off and then turn on the power of the computer system.

7. The computer system as claimed in claim 6, wherein the BIOS chip periodically reads a first specific address of an internal memory of the keyboard controller every a first time interval, and determines whether a buffer status flag is opportunely set to a specific value,

when the buffer status flag is not opportunely set to the specific value, the BIOS chip accumulates a keyboard controller error count value, and when the buffer status flag is opportunely set to the specific value, the BIOS chip zeroizes the keyboard controller error count value,

when the keyboard controller error count value is greater than a first value, the BIOS chip determines the time that the keyboard controller remains in the hang up state reaches the idle time limit, wherein a product of the first time interval and the first value is smaller than or equal to the idle time limit.

8. The computer system as claimed in claim 7, wherein after the BIOS chip zeroizes the keyboard controller error count value, the BIOS chip zeroizes a BIOS chip error count value recorded in a second specific address of the internal memory.

9. The computer system as claimed in claim 8, wherein the keyboard controller periodically reads and accumulates the BIOS chip error count value every a second time interval,

when the BIOS chip error count value is greater than a second value, the keyboard controller determines the time that the BIOS chip remains in the hang up state reaches the idle time limit, wherein a product of the second time interval and the second value is smaller than or equal to the idle time limit.

10. The computer system as claimed in claim 9, wherein the keyboard controller periodically sends an interrupt signal to the BIOS chip every a third time interval, the BIOS chip zeroizes the keyboard controller error count value after receiving the interrupt signal, wherein the third time interval is smaller than the idle time limit.

11. The computer system as claimed in claim 6, wherein the BIOS chip and the keyboard controller respectively transmit the hardware reset signal to the power management circuit through a general purpose input/output pin.

12. The computer system as claimed in claim 6, wherein the BIOS chip and the keyboard controller are communicated though a low pin count (LPC) interface.