Varying inductance

• US 8,779,881 B2
• Filed: 09/21/2012
• Issued: 07/15/2014
• Est. Priority Date: 09/21/2012
• Status: Active Grant

• Current Assignee: Qualcomm technologies international, ltd. (Qualcomm, Inc.)
• Original Assignee: Cambridge Silicon Radio Limited (Qualcomm, Inc.)
• Inventors: Gramegna, Giuseppe
• Primary Examiner(s): Talpalatski, Alexander
• Assistant Examiner(s): LIAN, MANG TIN BIK
• Application Number:
  US13/624,843
• Publication Number:
  US 20140085027A1
• Time in Patent Office: 662 Days
• Field of Search: 336143-150, 336/138, 336/232, 336/10, 307/113, 307/141.8, 307/115, 361/189, 361/628, 361/631
• US Class Current: 336/143
• CPC Class Codes: H01F 21/12 discontinuously variable, e.g. tapped
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

The present application relates to circuitry having a plurality of inductors, each inductor having a first end and a second end; and a switching arrangement connected to the first end and to the second end of each of the plurality of inductors for routing a current via the inductors; wherein the switching arrangement is arranged to at least one of selectably prevent current from flowing through a subset of the plurality of inductors and select a current flow direction through one of the inductors relative to a current flow direction through at least one other of the inductors so as to vary an effective inductance that the plurality of inductors represents to the current.

Claims

1. Circuitry comprising:

a plurality of inductors, each inductor having a first end and a second end; and

a switching arrangement connected to the first end and to the second end of each of the plurality of inductors for routing a current via the inductors;

wherein the switching arrangement is arranged to at least one of;

selectively prevent current from flowing through a subset of the plurality of inductors; and

select a current flow direction through one of the inductors relative to a current flow direction through at least one other of the inductors so as to vary an effective inductance that the plurality of inductors represents to the current

wherein the plurality of inductors comprises a

first inductor and a second inductor, and wherein the switching arrangement comprises;

a first pair of switches having a first switch connected to the first end of the first inductor and a second switch connected to the second end of the first inductor;

a second pair of switches having a third switch connected to the first end of the second inductor and a fourth switch connected to the second end of the second inductor;

a third pair of switches having a fifth switch connected to the first end of the first inductor and a sixth switch connected to the second end of the first inductor; and

a fourth pair of switches having a seventh switch connected to the first end of the second inductor and an eighth switch connected to the second end of the second inductor.

2. Circuitry according to claim 1, wherein two of the inductors in the plurality are conductors shaped as arches and the arches are nested one inside the other.

3. Circuitry according to claim 2, wherein each arch has two parallel straight sides joined by a straight section.

4. Circuitry according to claim 1, wherein the switching arrangement comprises a plurality of transistors that are configurable to select how the plurality of inductors connect to a source of the current.

5. Circuitry according to claim 1, wherein, when the first pair of switches and the second pair of switches are closed, and the third pair of switches and the fourth pair of switches are open, a current is able to flow through the first inductor in a first direction and through the second inductor in said first direction.

6. Circuitry according to claim 1, wherein when the first pair of switches and the fourth pair of switches are closed, and the second pair of switches and the third pair of switches are open, a current is able to flow through the first inductor in a first direction and through the second inductor in a second direction opposite to the first direction.

7. Circuitry according to claim 1, wherein when the first pair of switches are closed, and the second pair of switches, the third pair of switches and the fourth pair of switches are open, a current is able to flow through the first inductor in a first direction and no current is able to flow through the second inductor.

8. Circuitry according to claim 1, wherein when the second pair of switches are closed, and the first pair of switches, the third pair of switches and the fourth pair of switches are open, a current is able to flow through the second inductor in a first direction and no current is able to flow through the first inductor.

9. Circuitry according to claim 1, wherein the first, second, third, fourth, fifth, sixth, seventh and eighth switches are transistors.

10. An integrated circuit comprising the circuitry of claim 1.