Storage subsystem

• US 8,806,300 B2
• Filed: 05/25/2009
• Issued: 08/12/2014
• Est. Priority Date: 05/25/2009
• Status: Expired due to Fees

• Current Assignee: Hitachi, Ltd.
• Original Assignee: Hitachi, Ltd.
• Inventors: Kitahara, Jun, Takada, Masanori, Sugimoto, Sadahiro
• Primary Examiner(s): CHAUDRY, MUJTABA M
• Application Number:
  US12/526,666
• Publication Number:
  US 20110238885A1
• Time in Patent Office: 1,905 Days
• Field of Search: 714/770, 714/763
• US Class Current: 714/770
• CPC Class Codes: G06F 11/108 Parity data distribution in semiconductor storages, e.g. in SSD
• CPC Class Codes: G06F 2211/1054 Parity-fast hardware, i.e. dedicated fast hardware for RAID systems with parity
• CPC Class Codes: G06F 3/0604 Improving or facilitating administration, e.g. storage management
• CPC Class Codes: G06F 3/0613 in relation to throughput
• CPC Class Codes: G06F 3/0658 Controller construction arrangements
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: G06F 3/0688 Non-volatile semiconductor memory arrays

Abstract

The storage system includes a plurality of flash memory devices, each of the flash memory devices including a flash memory controller and flash memory chips, which are configured as a RAID group and a storage controller, coupled to the plurality of flash memory devices, configured to receive data from a computer and send the data to a first flash memory device of the plurality of flash memory devices. The flash memory controller of the flash memory device is configured to receive the data from the storage controller and execute a parity operation using the data.

Claims

1. A storage subsystem, comprising:

a first interface unit for sending and receiving information to and from a host computer via a network;

a storage apparatus for storing data;

a second interface unit, which is connected to the storage apparatus, and which carries out data input/output processing to/from the storage apparatus;

a control unit for controlling via the second interface unit the input/output processing to/from a plurality of logical devices allocated to storage areas of the storage apparatus; and

a cache memory for temporarily storing data in accordance with the processing of the control unit as a control target for the control unit,

wherein

the storage apparatus comprises a plurality of nonvolatile semiconductor memories each including a memory controller for controlling the input/output processing to/from the nonvolatile semiconductor memories, respectively, the nonvolatile semiconductor memories providing one or more RAID groups,

the control unit, when updating data stored in one of the nonvolatile semiconductor memories, reads the data to be updated, creates an XOR write command including updated data and the data to be updated, and sends the XOR write command to the memory controller of one of the nonvolatile semiconductor memories where parity data corresponding to the data to be updated is stored by way of the second interface unit, and

the memory controller, upon receiving the XOR write command, reads out from the one of the nonvolatile semiconductor memories the parity data corresponding to the data to be updated, creates a new parity by carrying out an XOR operation based on the read parity data corresponding to the data to be updated, the updated data and the data to be updated included in the XOR write command, and writes the created new parity to the one of the nonvolatile semiconductor memories.

2. The storage subsystem according to claim 1, wherein the control unit adds to the XOR write command a physical address of the old parity and a physical address of the new parity, as well as the old data and the new data, which are targeted for data updating,

the memory controller reads out the old parity from the one of the nonvolatile semiconductor memories in accordance with the old parity physical address added to the XOR wrote command, creates a new parity by carrying out an exclusive OR operation using the read-out old parity, and the old data and the new data added to the XOR write command, and stores the created new parity in a page belonging to a renewal area of the one of the nonvolatile semiconductor memories in accordance with the physical address of the new parity added to the XOR write command.

3. The storage subsystem according to claim 1, wherein

the memory controller transfers to the control unit in response to the XOR write command a status denoting the outcome of processing specified by the XOR write command, and

the control unit, upon receiving a completion status as the status from the memory controller, completes the processing in accordance with the creation of the XOR write command, and upon receiving an error status as the status from the memory controller, creates a new XOR write command for writing a new parity to a new renewal area of the one of the nonvolatile semiconductor memories, transfers the newly created XOR write command to the memory controller, and instructs the memory controller to carry out processing in accordance with the newly created XOR write command.

4. The storage subsystem according to claim 1, wherein

the memory controller transfers to the control unit in response to the XOR write command a status denoting the outcome of processing specified by the XOR write command, and

the control unit determines whether or not the memory controller has a malfunction when the status has not been returned from the memory controller within a fixed time period, and

when the memory controller has a malfunction, creates a parity from a plurality of data, executes a correction copy for copying the created parity to a spare nonvolatile semiconductor memory, creates a new XOR write command for writing the new parity to a new renewal area of the spare nonvolatile semiconductor memory, transfers the newly created XOR write command to the memory controller, and instructs the memory controller to carry out processing in accordance with the newly created XOR write command, and

when the memory controller is normal, and on a condition that new parity addition information written to the one of the nonvolatile semiconductor memories is normal, completes the processing in accordance with the creation of the XOR write command, based on determination that the new parity has been written normally to the one of the nonvolatile semiconductor memories.

5. The storage subsystem according to claim 1, wherein

the memory controller transfers to the control unit in response to the XOR write command a status denoting the outcome of processing specified by the XOR write command, and

the control unit determines whether or not the memory controller has a malfunction when the status has not been returned from the memory controller within a fixed time period,

when the memory controller has a malfunction, creates a parity from a plurality of data, executes a correction copy for copying the created parity to a spare nonvolatile semiconductor memory, creates a new XOR write command for writing the new parity to a new renewal area of the spare nonvolatile semiconductor memory, transfers the newly created XOR write command to the memory controller, and instructs the memory controller to carry out processing in accordance with the newly created XOR write command,

when the memory controller is normal, determines whether or not new parity addition information written to the one of the nonvolatile semiconductor memories is normal,

when the new parity addition information is written normally, completes the processing in accordance with the creation of the XOR write command, based on determination that the new parity has been written normally to the one of the nonvolatile semiconductor memories, and

one of the nonvolatile semiconductor memories, has been erased,

when the renewal area to be stored with the new parity has been erased, creates a new XOR write command for writing the new parity to the renewal area to be stored with the new parity, transfers the newly created XOR write command to the memory controller, and instructs the memory controller to carry out processing in accordance with the newly created XOR write command, and

when the renewal area to be stored with the new parity has not been erased, creates a new XOR write command for writing the new parity to a renewal area that is different from the renewal area to be stored with the new parity, transfers the newly created XOR write command to the memory controller, and instructs the memory controller to carry out processing in accordance with the newly created XOR write command.

6. The storage subsystem according to claim 1, wherein

the memory controller comprises a status recording memory for sequentially recording a status in which data input/output processing to/from the nonvolatile semiconductor memory is carried out,

the memory controller transfers contents recorded in the status recording memory to the control unit, and

the control unit, upon receiving contents recorded in the status recording memory from the memory controller, creates instruction information based on the received contents, transfers the created instruction information to the memory controller, and instructs the memory controller to carry out processing in accordance with the instruction information.

7. The storage subsystem according to claim 1, wherein

the memory controller comprises a status recording memory for sequentially recording a status in which data input/output processing to/from the nonvolatile semiconductor memory is carried out,

the memory controller transfers contents recorded in the status recording memory to the control unit, and

the control unit, upon receiving from the memory controller, as the contents recorded in the status recording memory, information denoting that processing has been canceled prior to the start of writing of the new parity write, creates on the basis of the received contents a new XOR write command for writing a new parity to the same renewal area of the one of the nonvolatile semiconductor memories, creates instruction information including the newly created XOR write command, transfers the created instruction information to the memory controller, and instructs the memory controller to carry out processing in accordance with the instruction information.

8. The storage subsystem according to claim 1, wherein

the memory controller comprises a status recording memory for sequentially recording a status in which data input/output processing to/from the nonvolatile semiconductor memory is carried out,

the memory controller transfers contents recorded in the status recording memory to the control unit, and

the control unit, upon receiving from the memory controller, as the contents recorded in the status recording memory, information denoting that processing has been canceled prior to the completion of writing of the new parity, creates on the basis of the received contents a new XOR write command for writing a new parity to a new renewal area of the one of the nonvolatile semiconductor memories, creates instruction information including the newly created XOR write command, transfers the created instruction information to the memory controller, and instructs the memory controller to carry out processing in accordance with the instruction information.

9. The storage subsystem according to claim 1, wherein

the memory controller comprises a status recording memory for sequentially recording a status in which data input/output processing to/from the nonvolatile semiconductor memory is carried out,

the memory controller transfers contents recorded in the status recording memory to the control unit, and

the control unit, upon receiving from the memory controller, as the contents recorded in the status recording memory, information denoting that processing has been canceled prior to pointer renewal, creates, on the basis of the received contents, instruction information for carrying out the pointer renewal, transfers the created instruction information to the memory controller, and instructs the memory controller to carry out processing in accordance with the instruction information.

10. The storage subsystem according to claim 1, wherein

the memory controller comprises a status recording memory for sequentially recording a status in which data input/output processing to/from the nonvolatile semiconductor memory is carried out,

the memory controller transfers contents recorded in the status recording memory to the control unit, and

the control unit, upon receiving from the memory controller, as the contents recorded in the status recording memory, information denoting that processing has been canceled prior to a status report, creates, on the basis of the received contents, instruction information to the effect that the processing for writing the new parity has completed normally, transfers the created instruction information to the memory controller, and instructs the memory controller to carry out processing in accordance with the instruction information.