Branch circuit determination with synchronous correlation

• US 8,850,240 B2
• Filed: 04/30/2012
• Issued: 09/30/2014
• Est. Priority Date: 08/25/2011
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Allen-Ware, Malcolm Scott, El-Essawy, Wael R, Ferreira, Alexandre Peixoto, Keller, Thomas Walter Jr., Rubio, Juan Carlos
• Primary Examiner(s): Connolly, Mark
• Application Number:
  US13/459,945
• Publication Number:
  US 20130054999A1
• Time in Patent Office: 883 Days
• Field of Search: 713/300, 713/400
• US Class Current: 713/300
• CPC Class Codes: G06F 1/26 Power supply means, e.g. regulation thereof for memories G11C
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A method for relating a data processing system with a power branch circuit is provided in the illustrative embodiments. A second signal is combined with a power signal to form a combination signal, the power signal including a first power usage by the data processing system and a second power usage by a modulating signal. The second signal is synchronized with the modulating signal in the power signal. A determination is made whether an amplitude of a frequency of the second signal is increasing in the combined signal over a period. Responsive to the determining being affirmative, the data processing system is related with the power branch circuit.

Claims

1. A computer implemented method for relating a data processing system with a power branch circuit, the method comprising:

combining, to form a combination signal, a second signal with a power signal, the power signal including a first power usage by the data processing system and a second power usage by a modulating signal;

synchronizing the second signal with the modulating signal in the power signal;

determining whether an amplitude of a frequency of the second signal is increasing in the combined signal over a period; and

relating, responsive to the determining being affirmative, the data processing system with the power branch circuit.

2. The computer implemented method of claim 1, further comprising:

determining whether the amplitude of the frequency of the second signal exceeds a threshold, and wherein the relating is further responsive to the amplitude exceeding the threshold.

3. The computer implemented method of claim 1, further comprising:

integrating the combination signal over the period; and

sampling the combination signal at a point in time in the period to determine the amplitude.

4. The computer implemented method of claim 1, wherein the synchronizing further includes using a third signal for ensuring that the modulating signal and the second signal are in-phase with each other.

5. The computer implemented method of claim 1, wherein the synchronizing further comprises:

changing a phase of the second signal from a first phase to a second phase;

determining whether the second phase of the second signal causes the synchronizing; and

repeating the changing and the determining for a third phase of the second signal responsive to the second phase of the second signal not causing the synchronizing.

6. The computer implemented method of claim 1, wherein the synchronizing further comprises:

setting the phase of the second signal to all possible phases of the modulating signal in parallel; and

determining whether any phase of the second signal causes the synchronizing.

7. The computer implemented method of claim 1, wherein the modulating signal is a low power and low frequency load applied to the data processing system using a signal generator device.

8. The computer implemented method of claim 1, wherein the signal generator device is coupled with the data processing system using a direct current powered port on the data processing system.

9. The computer implemented method of claim 1, wherein the signal generator device is coupled with the data processing system using an alternating current powered port on the data processing system.

10. The computer implemented method of claim 1, wherein the combining is a multiplication of the second signal with the power signal.

11. A computer usable program product comprising a computer readable storage device including computer usable code for relating a data processing system with a power branch circuit, the computer usable code comprising:

computer usable code for combining, to form a combination signal, a second signal with a power signal, the power signal including a first power usage by the data processing system and a second power usage by a modulating signal;

computer usable code for synchronizing the second signal with the modulating signal in the power signal;

computer usable code for determining whether an amplitude of a frequency of the second signal is increasing in the combined signal over a period; and

computer usable code for relating, responsive to the determining being affirmative, the data processing system with the power branch circuit.

12. The computer usable program product of claim 11, further comprising:

computer usable code for determining whether the amplitude of the frequency of the second signal exceeds a threshold, and wherein the relating is further responsive to the amplitude exceeding the threshold.

13. The computer usable program product of claim 11, further comprising:

computer usable code for integrating the combination signal over the period; and

computer usable code for sampling the combination signal at a point in time in the period to determine the amplitude.

14. The computer implemented method of claim 11, wherein the computer usable code for synchronizing further includes computer usable code for using a third signal for ensuring that the modulating signal and the second signal are in-phase with each other.

15. The computer usable program product of claim 11, wherein the synchronizing further comprises:

computer usable code for changing a phase of the second signal from a first phase to a second phase;

computer usable code for determining whether the second phase of the second signal causes the synchronizing; and

computer usable code for repeating the changing and the determining for a third phase of the second signal responsive to the second phase of the second signal not causing the synchronizing.

16. The computer usable program product of claim 11, wherein the synchronizing further comprises:

computer usable code for setting the phase of the second signal to all possible phases of the modulating signal in parallel; and

computer usable code for determining whether any phase of the second signal causes the synchronizing.

17. The computer usable program product of claim 11, wherein the modulating signal is a low power and low frequency load applied to the data processing system using a signal generator device.

18. The computer usable program product of claim 11, wherein the computer usable code is stored in a computer readable storage medium in a data processing system, and wherein the computer usable code is transferred over a network from a remote data processing system.

19. The computer usable program product of claim 11, wherein the computer usable code is stored in a computer readable storage medium in a server data processing system, and wherein the computer usable code is downloaded over a network to a remote data processing system for use in a computer readable storage medium associated with the remote data processing system.

20. A data processing system for relating a data processing system with a power branch circuit, the data processing system comprising:

a storage device including a storage medium, wherein the storage device stores computer usable program code; and

a processor, wherein the processor executes the computer usable program code, and wherein the computer usable program code comprises;

computer usable code for combining, to form a combination signal, a second signal with a power signal, the power signal including a first power usage by the data processing system and a second power usage by a modulating signal;

computer usable code for synchronizing the second signal with the modulating signal in the power signal;

computer usable code for determining whether an amplitude of a frequency of the second signal is increasing in the combined signal over a period; and

computer usable code for relating, responsive to the determining being affirmative, the data processing system with the power branch circuit.