Touch sensing method and apparatus

• US 8,854,064 B2
• Filed: 07/15/2011
• Issued: 10/07/2014
• Est. Priority Date: 07/15/2011
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Aras, Sualp, Nihei, Tatsuyuki, Rahman, Abidur
• Primary Examiner(s): Koval, Melissa
• Assistant Examiner(s): HOQUE, FARHANA AKHTER
• Application Number:
  US13/184,292
• Publication Number:
  US 20130015867A1
• Time in Patent Office: 1,180 Days
• Field of Search: 324658-690, 324/649, 345/173, 345/174, 702/47, 702/52
• US Class Current: 324/684
• CPC Class Codes: G01D 5/24 by varying capacitance
• CPC Class Codes: G01P 15/125 by capacitive pick-up
• CPC Class Codes: G06F 3/04182 Filtering of noise external to the device and not generated by digitiser components
• CPC Class Codes: G06F 3/044 by capacitive means
• CPC Class Codes: H03M 11/02 Details
• CPC Class Codes: H03M 3/34 by chopping
• CPC Class Codes: H03M 3/458 Analogue/digital converters using delta-sigma modulation as an intermediate step

Abstract

A method for measuring for generating a touch capacitance measurement is provided. Gain and offset control signals are generated, where the gain and offset control signals are adjusted to compensate for base capacitance of a touch sensor. The gain control signal is applied to a touch sensor during a first phase of a clock signal, and the offset control signal is applied to an output circuit during a second phase of the clock signal. The output circuit is coupled to the touch sensor during the second phase of the clock signal. The touch capacitance measurement is generated by compensating for the base capacitance with the gain and offset control signals, and a gain is applied to the touch capacitance measurement.

Claims

1. An apparatus comprising:

an interface that is configured to communicate with a touch sensor having a base capacitance; and

a capacitance-to-voltage converter that receives a clock signal and that is coupled to the interface, wherein the capacitance-to-voltage converter generates gain control and offset signals, and wherein the capacitance-to-voltage converter is configured to apply the gain control signals to the touch sensor during a first phase of the clock signal, and the gain and offset control signals are adjusted to compensate for the base capacitance, and wherein the capacitance-to-voltage converter uses the gain and offset control signals during a second phase of the clock signal to compensate for the base capacitance and provide a touch capacitance measurement.

2. The apparatus of claim 1, wherein the output circuit includes a capacitor that is configured to be adjustable.

3. The apparatus of claim 2, wherein the capacitance-to-voltage converter further comprises:

a gain control circuit that is coupled to the interface and that receives the clock signal;

an output circuit that is coupled to the gain control circuit, wherein the output circuit includes the capacitor; and

an offset control circuit that is coupled to the output circuit and that receives the clock signal.

4. The apparatus of claim 3, wherein the gain control circuit further comprises:

a first transmission gate that is coupled between the interface and the output circuit and that is activated during the second phase of the clock signal;

a second transmission gate that is coupled to the interface and that is activated during the first phase of the clock signal; and

a digital-to-analog converter (DAC) that is coupled to the second transmission gate and that generates the gain control signal.

5. The apparatus of claim 4, wherein the DAC further comprises a first DAC, and wherein the gain control circuit further comprises:

a second DAC that generates the offset control signal;

a third transmission gate that is coupled between the second DAC and the output circuit and that is activated during the second phase of the clock signal; and

a fourth transmission gate that is coupled to the output circuit and that is activated during the first phase of the clock signal.

6. The apparatus of claim 5, wherein the clock signal further comprises a first clock signal, and wherein the capacitor further comprises a first capacitor, and wherein the output circuit further comprises:

a second capacitor that is coupled to the third and fourth transmission gates;

an amplifier having a first input terminal, a second input terminal, and a output terminal, wherein the first input terminal of the amplifier is coupled to the second capacitor and the first transmission gate, and wherein the first capacitor is coupled between the first input terminal of the amplifier and the output terminal of the amplifier, and wherein the second input terminal of the amplifier receives a common mode voltage; and

a fifth transmission gate that is controlled by the second clock signal and that is coupled between the first input terminal of the amplifier and the output terminal of the amplifier.

7. The apparatus of claim 5, wherein the capacitor further comprises a first capacitor, and wherein the output circuit further comprises:

a second capacitor that is coupled to the offset control circuit; and

an amplifier having a first input terminal, a second input terminal, and a output terminal, wherein the first input terminal of the amplifier is coupled to the second capacitor and the gain control circuit, and wherein the first capacitor is coupled between the first input terminal of the amplifier and the output terminal of the amplifier, and wherein the second input terminal of the amplifier receives a common mode voltage.

8. The apparatus of claim 5, wherein the clock signal further comprises a first clock signal, and wherein the output circuit further comprises a first transmission gate that is controlled by the second clock signal and that is coupled between the first input terminal of the amplifier and the output terminal of the amplifier.

9. The apparatus of claim 8, wherein the gain control circuit further comprises:

a DAC that generates the offset control signal;

a second transmission gate that is coupled between the DAC and the second capacitor and that is activated during the second phase of the clock signal; and

a third transmission gate that is coupled to the second capacitor and that is activated during the first phase of the clock signal.

10. The apparatus of claim 9, wherein the DAC further comprises a first DAC, and wherein the gain control circuit further comprises:

a fourth transmission gate that is coupled between the interface and the first input terminal of the amplifier and that is activated during the second phase of the clock signal;

a fifth transmission gate that is coupled to the interface and that is activated during the first phase of the clock signal; and

a second DAC that is coupled to the second transmission gate and that generates the gain control signal.

11. The apparatus of claim 10, wherein the touch panel controller further comprises:

an analog-to-digital converter (ADC) that is coupled to the output terminal of the amplifier;

a digital front end (DFE) that is coupled to the ADC; and

control logic that is coupled to the DFE, the first and second DACs, and the first, second, third, fourth, and fifth transmission gates.

12. The apparatus of claim 11, wherein the ADC is a successive approximation register (SAR) ADC.

13. The apparatus of claim 12, wherein the DFE provides noise cancellation using correlated double sampling (CDS).

14. An apparatus comprising:

a touch panel having a plurality of touch sensors, wherein each touch sensor has a base capacitance;

a touch panel controller having;

an interface that is coupled to each touch sensor;

a capacitance-to-voltage converter having;

a gain control circuit that is coupled to the interface and that receives a clock signal, wherein the gain control circuit generates a gain control signal, and wherein the gain control circuit is configured to apply the gain control signal to a selected touch sensor from the plurality of touch sensors during a first phase of the clock signal;

an output circuit that is coupled to the gain control circuit, wherein the output circuit is configured to be coupled to the touch sensor during a second phase of the clock signal; and

an offset control circuit that is coupled to the output circuit and that receives the clock signal, wherein the offset control circuit generates an offset control signal, and wherein the offset control circuit applies the offset control signal to the output circuit during the second phase of the clock signal, and wherein the gain and offset control signals are adjusted to compensate for the base capacitance of the selected touch sensor.

15. The apparatus of claim 14, wherein the output circuit includes a capacitor that is configured to be adjustable.

16. A method comprising:

generating gain and offset control signals, wherein the gain and offset control signals are adjusted to compensate for base capacitance of a touch sensor;

applying the gain control signal to a touch sensor during a first phase of a clock signal;

applying the offset control signal to an output circuit during a second phase of the clock signal;

coupling the output circuit to the touch sensor during the second phase of the clock signal;

compensating for the base capacitance with the gain and offset control signals to generate a touch capacitance measurement; and

applying a gain to the touch capacitance measurement.

17. The method of claim 16, wherein the step of applying the gain control signal further comprises coupling a DAC to the touch sensor during the first phase of the clock signal.

18. The method of claim 17, wherein the method further comprises converting the touch measurement with the applied gain to a digital signal.

19. The method of claim 18, wherein the method further comprises performing a CDS operation on the digital signal to compensate for noise.