Analog digital converter

• US 8,860,591 B2
• Filed: 05/31/2012
• Issued: 10/14/2014
• Est. Priority Date: 07/29/2011
• Status: Active Grant

• Current Assignee: Socionext Inc.
• Original Assignee: Fujitsu Semiconductor Limited (Fujitsu Limited)
• Inventors: Nozaki, Takeshi
• Primary Examiner(s): NGUYEN, LINH V
• Application Number:
  US13/485,771
• Publication Number:
  US 20130027233A1
• Time in Patent Office: 866 Days
• Field of Search: 341/118, 341/155, 341/159, 341/120, 341/141, 341/142
• US Class Current: 341/120
• CPC Class Codes: H03M 1/0626 by filtering
• CPC Class Codes: H03M 1/0836 of phase error, e.g. jitter
• CPC Class Codes: H03M 1/12 Analogue/digital converters H03M1/001 – H03M1/10 take precedence
• CPC Class Codes: H03M 1/1215 using time-division multiplexing

Abstract

An ADC which samples an analog input signal at a sampling frequency and converts the analog input signal to a digital output signal, has N analog digital converter (ADC) channels which convert the analog input signal into the digital output signal by time interleaving, a channel synthesizer which synthesizes channel digital signals output respectively by the ADC channels to generate the digital output signal, an adaptive filter provided at at least one output of the ADC channels, and a correction circuit which generates a coefficient of the adaptive filter in accordance with the digital output signal. The correction circuit calculates a DC component of an image signal component, from among an analog input signal component and the image signal component corresponding to error, both being included in the digital output signal, and calculates the coefficient such that the DC component is suppressed on the basis of the DC component.

Claims

1. An analog digital converter which converts an analog input signal to a digital output signal by sampling at a sampling frequency, comprising:

N analog digital converter channels each being configured to convert the analog input signal into a plurality of channel digital signals in synchronous with sampling clocks having frequency obtained by N dividing the sampling frequency;

an adaptive filter being configured to filter at least one of the plurality of channel digital signals;

a channel synthesizer being configured to synthesize the plurality of channel digital signals respectively being output through or not through the adaptive filter from the analog digital converter channels, and outputs the digital output signal; and

a correction circuit being configured to generate a coefficient of the adaptive filter in accordance with the digital output signal and set the coefficient to the adaptive filter, wherein

the correction circuit extracts, from among an image signal component corresponding to a skew error between the N divided sampling clocks, and an analog input signal component, both of which are included in the digital output signal, a DC component of the image signal component, and generates the coefficient of the adaptive filter on the basis of the DC component of the image signal such that the DC component of the image signal component is suppressed.

2. The analog digital converter according to claim 1, wherein

the correction circuit comprises:

a frequency shift circuit which shifts a frequency of the digital output signal by frequency of N divided sampling frequency;

a phase shift circuit which shifts a phase of an output of the frequency shift circuit by −

π

/2;

a first adding circuit which adds the digital output signal and the output signal of the phase shift circuit;

a first subtracting circuit which subtracts the output signal of the phase shift circuit from the digital output signal;

first and second squaring circuits which respectively square the output of the first adding circuit and the output of the first subtracting circuit;

first and second averaging circuits which respectively average the outputs of the first and second squaring circuits;

first and second square root circuits which respectively calculate square roots of the outputs of the first and second averaging circuits;

a second subtracting circuit which outputs the DC component of the image signal component by subtracting the outputs of the first and second square root circuits; and

a coefficient calculation circuit which generates the coefficient of the adaptive filter on the basis of a subtraction output of the second subtracting circuit so as to suppress the subtraction output.

3. The analog digital converter according to claim 2, wherein the first and second averaging circuits comprises first and second accumulators which respectively accumulate the outputs of the first and second squaring circuits.

4. The analog digital converter according to claim 3, wherein

the correction circuit further comprises first and second step size multipliers, which are provided respectively between the first and second squaring circuits and the first and second accumulators, and which respectively multiply the outputs of the first and second squaring circuits by a step size;

and

the coefficient calculation circuit generates the coefficient of the adaptive filter by a least squares method on the basis of a subtraction output of the second subtracting circuit.

5. The analog digital converter according to claim 4, wherein the correction circuit further comprises a robust correction circuit, which is provided respectively between the first and second squaring circuits and the first and second step size multipliers, and which averages values having large error in the outputs of the first and second squaring circuits.

6. The analog digital converter according to claim 3 or 4, wherein the correction circuit further comprises an update control compensation circuit which updates the subtraction output of the second subtracting circuit, for each predetermined number of samplings, and clears an accumulated value by resetting the second accumulator for each predetermined number of samplings.

7. The analog digital converter according to claim 3, wherein

the correction circuit further comprises first and second moving average circuits, which are provided respectively between the first and second squaring circuits and the first and second accumulators, and which respectively calculate the moving average value of the outputs of the first and second squaring circuits, for a predetermined number of samples;

and

the coefficient calculation circuit generates the coefficient of the adaptive filter by a least squares method on the basis of the subtraction output.

8. The analog digital converter according to claim 7, wherein the correction circuit further comprises an update control compensation circuit which updates the subtraction output of the second subtracting circuit, for each predetermined number of samplings, and clears an accumulated value by resetting the first and second accumulators and the first and second moving average circuits for each predetermined number of samplings.

9. The analog digital converter according to claim 2, wherein the first and second averaging circuits comprise:

first and second moving average circuits which respectively calculate moving average values of a predetermined number of samples of the outputs of the first and second squaring circuits, and first and second accumulators which respectively accumulate the moving average values of the first and second moving average circuits.

15. The analog digital converter according to claim 1, wherein the analog input signal has an input frequency (fin), the analog input signal component has the input frequency (fin), and the image signal component has a frequency (fs/N−

fin) that the input frequency (fin) is subtracted from an N divided sampling frequency (fs/N).

10. An correction circuit for an analog digital converter which converts the analog input signal to a digital output signal by sampling at a sampling frequency, the analog digital converter having,

N analog digital converter channels each being configured to convert the analog input signal to a plurality of channel digital output signals in synchronous with sampling clocks having frequency obtained by N dividing the sampling frequency;

an adaptive filter being configured to filter at least one of the plurality of channel digital signals; and

a channel synthesizer being configured to synthesize the plurality of channel digital signals respectively being output through or not through the adaptive filter from the analog digital converter channels, and outputs the digital output signal, wherein

the correction circuit comprising;

a first calculator being configured to extract, from among an image signal component corresponding to a skew error between the N divided sampling clocks, and an analog input signal component, both of which are included in the digital output signal, a DC component of the image signal component; and

from the digital output signal; and

a second calculator being configured to generate the coefficient of the adaptive filter on the basis of the DC component of the image signal such that the DC component of the image signal component is suppressed, and set the coefficient to the adaptive filter.

11. The correction circuit according to claim 10, wherein

the correction circuit comprises:

a frequency shift circuit which shifts a frequency of the digital output signal by frequency of N divided sampling frequency;

a phase shift circuit which shifts a phase of an output of the frequency shift circuit by −

π

/2;

a first adding circuit which adds the digital output signal and the output signal of the phase shift circuit;

a first subtracting circuit which subtracts the output signal of the phase shift circuit from the digital output signal;

first and second squaring circuits which respectively square the output of the first adding circuit and the output of the first subtracting circuit;

first and second averaging circuits which respectively average the outputs of the first and second squaring circuits;

first and second square root circuits which respectively calculate square roots of the outputs of the first and second averaging circuits;

a second subtracting circuit which outputs the DC component of the image signal by subtracting the outputs of the first and second square root circuits; and

a coefficient calculation circuit which generates the coefficient on the basis of a subtraction output of the second subtracting circuit so as to suppress the subtraction output.

12. The correction circuit according to claim 11, further comprising an update control compensation circuit which updates the subtraction output of the second subtracting circuit, for each predetermined number of samplings, and clears an accumulated value by resetting the second accumulator for each predetermined number of samplings.

16. The correction circuit according to claim 10, wherein the analog input signal has an input frequency (fin), the analog input signal component has the input frequency (fin), and the image signal component has a frequency (fs/N−

fin) that the input frequency (fin) is subtracted from an N divided sampling frequency (fs/N).

13. An correction method for an analog digital converter which converts the analog input signal to a digital output signal by sampling at a sampling frequency, the analog digital converter having:

N analog digital converter channels each being configured to convert the analog input signal to a plurality of channel digital signals in synchronous with sampling clocks having frequency obtained by N dividing the sampling frequency;

an adaptive filter being configured to filter at least one of the plurality of channel digital signals; and

a channel synthesizer being configured to synthesize the plurality of channel digital signals respectively being output through or not through the adaptive filter from the analog digital converter channels, and outputs the digital output signal,

the method comprising;

extracting, from among an image signal component corresponding to a skew error between the N divided sampling clocks, and an analog input signal component, both of which are included in the digital output signal, a DC component of the image signal component;

generating the coefficient of the adaptive filter on the basis of the DC component of the image signal such that the DC component of the image signal component is suppressed; and

setting the coefficient in the adaptive filter.

14. The correction method according to claim 13, wherein

the correction method comprising:

shifting a frequency of the digital output signal by frequency of N divided sampling frequency;

shifting a phase of the frequency shifted signal by −

π

/2;

adding the digital output signal and the phase shifted signal;

subtracting the phase shifted signal from the digital output signal;

respectively squaring the signal obtained in the adding and the signal obtained in the subtracting;

respectively averaging the signals obtained in the squaring;

respectively calculating square roots of the signal generated in the averaging;

subtracting the signals generated in the square root calculating so as to generate the DC component of the image signal component; and

generating the coefficient on the basis of the DC component generated in the subtracting so as to suppress the DC component.

17. The correction method according to claim 13, wherein the analog input signal has an input frequency (fin), the analog input signal component has the input frequency (fin), and the image signal component has a frequency (fs/N−

fin) that the input frequency (fin) is subtracted from an N divided sampling frequency (fs/N).