Multiple display frame rendering method and apparatus

• US 8,866,825 B2
• Filed: 12/15/2010
• Issued: 10/21/2014
• Est. Priority Date: 12/15/2010
• Status: Active Grant

• Current Assignee: ATI Technologies ULC (Advanced Micro Devices, Inc.)
• Original Assignee: ATI Technologies ULC (Advanced Micro Devices, Inc.)
• Inventors: Cheng, Jeffrey G.
• Primary Examiner(s): Wu, Xiao
• Assistant Examiner(s): Sonners, Scott E
• Application Number:
  US12/968,636
• Publication Number:
  US 20120154411A1
• Time in Patent Office: 1,406 Days
• Field of Search: 345/502, 345/504, 345/505, 345/541, 345/545, 345/554, 345/903, 345/539
• US Class Current: 345/505
• CPC Class Codes: G06T 1/20 Processor architectures; Processor configuration, e.g. pipelining

Abstract

An apparatus includes a plurality of image processing circuits. Each image processing circuit generates an image frame corresponding to a single large surface. The first image processing circuit provides a portion of the generated image frame for a first display or plurality of displays and provides a remaining portion of the image frame to the remaining image processing circuits. The next image processing circuits provides the remaining portion of the image frame for the next plurality of displays.

Claims

1. An apparatus comprising:

at least a first image processing circuit that is operative to generate a first rendered image frame corresponding with a single large surface, wherein the first image processing circuit is operative to provide a portion of the first rendered image frame for at least a first display and to provide a remaining portion of the first rendered image frame to at least a second image processing circuit; and

the second image processing circuit, operatively coupled to the first image processing circuit, operative to provide the remaining portion of the first rendered image frame for at least a second display, and operative to generate a second rendered image frame and to provide a first portion of the second rendered image frame for the second display and to provide a remaining portion of the second rendered image frame for the first display.

2. The apparatus of claim 1 wherein the first image processing circuit is operative to provide the remaining portion of the first rendered image frame after the second image processing circuit has presented a previous remaining portion of a previous rendered image frame corresponding with the single large surface for the second display.

3. The apparatus of claim 1 wherein the second image processing circuit is operative to generate the second rendered image frame concurrent with the first image processing circuit generating a third rendered image frame.

4. The apparatus of claim 1 wherein the first image processing circuit is operative to provide the portion of the first rendered image frame for the first display concurrently with the second image processing circuit providing the remaining portion of the first rendered image frame for the second display.

5. The apparatus of claim 1 wherein the first image processing circuit is operative to provide the portion of the first rendered image frame for the first display after the second image processing circuit receives the remaining portion of the first rendered image frame.

6. The apparatus of claim 1 wherein the first image processing circuit provides the portion of the first rendered image frame for a plurality of displays and wherein the second image processing circuit provides the remaining portion of the first rendered image frame to a second plurality of displays.

7. The apparatus of claim 6 comprising the first plurality of displays and the second plurality of displays operatively coupled to the first image processing circuit and the second image processing circuit respectively.

8. A method comprising:

generating, with at least a first image processing circuit, a first rendered image frame corresponding with a single large surface;

providing, with the first image processing circuit, a portion of the first rendered image frame for at least a first display;

providing a remaining portion of the first rendered image frame to at least a second image processing circuit;

providing the remaining portion of the first rendered image frame for at least a second display;

generating, with the second image processing circuit, a second rendered image frame;

providing, with the second image processing circuit, a first portion of the second rendered image frame for the second display; and

providing, with the second image processing circuit, a remaining portion of the second rendered image frame for the first display.

9. The method of claim 8 comprising providing the remaining portion of the first rendered image frame after the second image processing circuit has presented a previous remaining portion of a previous rendered image frame corresponding with the single large surface for the second display.

10. The method of claim 8 comprising generating, with the second image processing circuit, the second rendered image frame concurrent with the first image processing circuit generating a third rendered image frame.

11. The method of claim 8 comprising providing the portion of the first rendered image frame for the first display concurrently with providing the remaining portion of the first rendered image frame for the second display.

12. The method of claim 8 comprising providing the portion of the first rendered image frame for the first display after the second image processing circuit receives the remaining portion of the first rendered image frame.

13. The method of claim 8 comprising providing the portion of the first rendered image frame for a plurality of displays and providing the remaining portion of the first rendered image frame to a second plurality of displays.

14. A non-transitory computer readable medium comprising:

executable instructions stored therein that when executed by one or more image processing circuits, causes at least a first image processing circuit to;

generate a first rendered image frame corresponding with a single large surface;

provide a portion of the first rendered image frame for at least a first display; and

provide a remaining portion of the first rendered image frame for a second image processing circuit;

wherein the executable instructions when executed by the one or more image processing circuits cause at least the second image processing circuit to;

provide the remaining portion of the first rendered image frame for a second display;

generate a second rendered image frame;

provide a first portion of the second rendered image frame for the second display; and

provide a remaining portion of the second rendered image frame for the first display.

15. The computer readable medium of claim 14 comprising executable instructions that when executed cause the at least first image processing circuit to provide the remaining portion of the first rendered image frame after the at least second image processing circuit has presented a previous remaining portion of a previous rendered image frame corresponding with the single large surface for the second display.

16. The computer readable medium of claim 14 comprising executable instructions that when executed cause the at least second image processing circuit to generate the second rendered image frame concurrent with the first image processing circuit generating a third rendered image frame.