Antenna adjustment circuit, antenna adjustment method, and communication unit

• US 8,886,145 B2
• Filed: 03/26/2012
• Issued: 11/11/2014
• Est. Priority Date: 03/26/2012
• Status: Active Grant

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Matsui, Hiroshi, Griffiths, Bernie
• Primary Examiner(s): VO, NGUYEN THANH
• Application Number:
  US13/430,208
• Publication Number:
  US 20130249750A1
• Time in Patent Office: 960 Days
• Field of Search: 455/41.1, 455/41.2, 455/120, 455/121, 455/123, 455/193.1, 455/193.2, 343/745
• US Class Current: 455/193.1
• CPC Class Codes: H01Q 1/242 specially adapted for hand-held use

Abstract

An antenna adjustment circuit includes: a drive section that inputs an alternating drive signal to a variable capacitance connected to an antenna; and a control section that sets a capacitance value of the variable capacitance, based on a phase of an output signal derived from the variable capacitance.

Claims

1. An antenna adjustment circuit, comprising:

a drive section inputting an alternating drive signal to a variable capacitance connected to an antenna; and

a control section setting a capacitance value of the variable capacitance, based on a phase of an output signal derived from the variable capacitance, wherein;

the antenna includes two terminals,

the variable capacitance includes two terminals,

a first terminal of the two terminals of the antenna is connected to a first terminal of the two terminals of the variable capacitance via a first capacitive device, and

a second terminal of the two terminals of the antenna is connected to a second terminal of the two terminals of the variable capacitance via a second capacitive device.

2. The antenna adjustment circuit according to claim 1, wherein the alternating drive signal is an alternating current signal.

3. The antenna adjustment circuit according to claim 1, wherein the alternating drive signal is an alternating voltage signal.

4. The antenna adjustment circuit according to claim 1, wherein the antenna includes two terminals, and the variable capacitance is connected between the two terminals of the antenna.

5. The antenna adjustment circuit according to claim 1, wherein the antenna performs parallel resonance.

6. The antenna adjustment circuit according to claim 1, wherein the antenna adjustment circuit includes the variable capacitance.

7. The antenna adjustment circuit according to claim 1, wherein the variable capacitance includes:

two terminals; and

a plurality of capacitive devices, each of the capacitive devices being connected in parallel between the terminals via a switch.

8. The antenna adjustment circuit according to claim 7, wherein

a capacitance value of each of the capacitive devices is weighted, and

an ON resistance of a switch of the switches connected to a capacitive device of the capacitive devices with a larger capacitance value is smaller.

9. The antenna adjustment circuit according to claim 1, further comprising a nonvolatile memory that stores data used to set the capacitance value of the variable capacitance.

10. An antenna adjustment circuit comprising:

a drive section inputting an alternating drive signal to a variable capacitance connected to an antenna; and

a control section setting a capacitance value of the variable capacitance, based on a phase of an output signal derived from the variable capacitance, wherein;

the drive section generates the alternating drive signal based on a clock signal, and

the control section sets the capacitance value of the variable capacitance, based on a phase difference between the clock signal and the output signal.

11. The antenna adjustment circuit according to claim 10, wherein the control section sets the capacitance value of the variable capacitance to allow the clock signal and the output signal to have substantially a same phase.

12. The antenna adjustment circuit according to claim 10, wherein

the variable capacitance includes two terminals, and

the drive section includes:

a first transistor having a gate to which the clock signal is applied, and a drain connected to a first terminal of the two terminals of the variable capacitance, the first transistor being a transistor of a conductive type; and

a second transistor having a gate to which the clock signal is applied, and a drain connected to the first terminal of the two terminals of the variable capacitance, the second transistor being a transistor of a conductive type different from that of the first transistor.

13. The antenna adjustment circuit according to claim 12, wherein the drive section further includes:

a third transistor having a gate to which an inversion signal of the clock signal is applied, and a drain connected to a second terminal of the two terminals of the variable capacitance, the third transistor being a transistor of a conductive type; and

a fourth transistor having a gate to which the inversion signal of the clock signal is applied, and a drain connected to the second terminal of the two terminals of the variable capacitance, the fourth transistor being a transistor of a conductive type different from that of the third transistor.

14. The antenna adjustment circuit according to claim 13, further comprising a current source connected to a source of the first transistor and a source of the third transistor.

15. The antenna adjustment circuit according to claim 10, further comprising a phase comparison section detecting the phase difference between the clock signal and the output signal,

wherein the control section sets the capacitance value of the variable capacitance, based on a comparison result obtained in the phase comparison section.

16. The antenna adjustment circuit according to claim 10, further comprising an amplification section amplifying the output signal,

wherein the output signal is a voltage signal, and

the control section sets the capacitance value of the variable capacitance, based on the phase difference between the clock signal and the output signal amplified in the amplification section.

17. An antenna adjustment method, comprising:

generating an alternating drive signal based on a clock signal;

inputting the alternating drive signal to a variable capacitance connected to an antenna;

deriving an output signal from the variable capacitance; and

setting a capacitance value of the variable capacitance,

wherein the capacitance value is set based on a phase difference between the clock signal and the output signal.

18. A communication unit with an antenna, a communication section performing communication using the antenna, and an antenna adjustment circuit, the antenna adjustment circuit comprising:

a drive section inputting an alternating drive signal to a variable capacitance connected to the antenna; and

a control section setting a capacitance value of the variable capacitance, based on a phase of an output signal derived from the variable capacitance, wherein;

the antenna includes two terminals,

the variable capacitance includes two terminals,

a first terminal of the two terminals of the antenna is connected to a first terminal of the two terminals of the variable capacitance via a first capacitive device, and

a second terminal of the two terminals of the antenna is connected to a second terminal of the two terminals of the variable capacitance via a second capacitive device.

19. The communication unit according claim 18, wherein

the communication section includes a frequency synthesizer that generates a clock signal, and

the drive section generates the alternating drive signal, based on the clock signal.