Lattice structure for capacitance sensing electrodes

• US 8,901,944 B2
• Filed: 08/05/2011
• Issued: 12/02/2014
• Est. Priority Date: 01/15/2010
• Status: Active Grant

• Current Assignee: Wistron Corporation
• Original Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Inventors: Chai, Min Chin, Prendergast, Patrick, Peng, Tao
• Primary Examiner(s): Hollington, Jermele M
• Assistant Examiner(s): MCANDREW, CHRISTOPHER P
• Application Number:
  US13/198,717
• Publication Number:
  US 20110316567A1
• Time in Patent Office: 1,215 Days
• Field of Search: 324/686, 361/280, 345/173, 345/174
• US Class Current: 324/686
• CPC Class Codes: G01D 5/24 by varying capacitance
• CPC Class Codes: G01R 1/02 General constructional details
• CPC Class Codes: G06F 2203/04111 Cross over in capacitive digitiser, i.e. details of structures for connecting electrodes of the sensing pattern where the connections cross each other, e.g. bridge structures comprising an insulating layer, or vias through substrate
• CPC Class Codes: G06F 3/0443 using a single layer of sensing electrodes
• CPC Class Codes: G06F 3/0445 using two or more layers of sensing electrodes, e.g. using two layers of electrodes separated by a dielectric layer
• CPC Class Codes: G06F 3/0446 using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes
• CPC Class Codes: H03K 17/9622 using a plurality of detectors, e.g. keyboard
• CPC Class Codes: H03K 2217/960775 Emitter-receiver or "fringe" type detection, i.e. one or more field emitting electrodes and corresponding one or more receiving electrodes

Abstract

One embodiment of a capacitive sensor array may comprise a first plurality of sensor elements and a second sensor element comprising a main trace, where the main trace intersects each of the first plurality of sensor elements to form a plurality of intersections. A unit cell may be associated with each of the intersections, and each unit cell may designate a set of locations nearest to the corresponding intersection. A contiguous section of the main trace may cross at least one of the plurality of unit cells. Within each unit cell, the second sensor element may comprise at least one primary subtrace branching away from the main trace.

Claims

1. A capacitive sensor array, comprising:

a first plurality of sensor elements each comprising a core trace, wherein for each sensor element of the first plurality of sensor elements, the core trace of the sensor element is wider than any other trace of the sensor element; and

a second sensor element comprising a main trace, wherein the main trace crosses the core trace of each of the first plurality of sensor elements at a corresponding bridge to form a plurality of intersections each associated with a unit cell, wherein each of the plurality of unit cells designates a set of locations nearest a corresponding intersection, wherein a contiguous section of the main trace crosses at least one of the plurality of unit cells, wherein a contiguous section of the core trace of each of the first plurality of sensor elements crosses at least one of the plurality of unit cells, and wherein, within each unit cell, the second sensor element comprises at least one primary subtrace branching away from the main trace.

2. The capacitive sensor array of claim 1, wherein the at least one primary subtrace is substantially orthogonal to the main trace at a junction between the at least one primary subtrace and the main trace.

3. The capacitive sensor array of claim 1, wherein the at least one primary subtrace comprises at least two primary subtraces.

4. The capacitive sensor array of claim 3, wherein a first of the at least two primary subtraces has a different length than a second of the at least two primary subtraces.

5. The capacitive sensor array of claim 3, wherein the at least two primary subtraces branch from opposite sides of the main trace and are symmetrical about an axis of symmetry extending along a portion of the main trace.

6. The capacitive sensor array of claim 3, wherein the at least two primary subtraces branch from a same side of the main trace and are parallel.

7. The capacitive sensor array of claim 3, further comprising one or more dummy traces situated between the at least two primary subtraces, wherein each of the one or more dummy traces comprises conductive material that is electrically isolated from both the first plurality of sensor elements and the second sensor element.

8. The capacitive sensor array of claim 1, further comprising one or more dummy traces between each of the first plurality of sensor elements, wherein the one or more dummy traces comprise conductive material that is electrically isolated from both the first plurality of sensor elements and the second sensor element.

9. A capacitive sensor array, comprising:

a first plurality of sensor elements, wherein each of the first plurality of sensor elements comprises a core trace, wherein for each sensor element of the first plurality of sensor elements, the core trace of the sensor element is wider than any other trace of the sensor element; and

a second sensor element capacitively coupled to each of the first plurality of sensor elements, wherein the second sensor element comprises;

a main trace, and a plurality of primary subtraces branching away from the main trace, wherein the main trace intersects the core trace of each of the first plurality of sensor elements at a corresponding bridge to form a plurality of unit cells, wherein each of the plurality of unit cells designates an area corresponding to an intersection between the second sensor element and one of the first plurality of sensor elements, wherein a contiguous section of the main trace crosses at least one of the plurality of unit cells, and wherein a contiguous section of the core trace of each of the first plurality of sensor elements crosses at least one of the plurality of unit cells.

10. The capacitive sensor array of claim 9, wherein, for each of the plurality of unit cells, each point within the unit cell is nearer to the intersection corresponding to the unit cell than to any other intersection between the second sensor element and one of the first plurality of sensor elements, and wherein the main trace extends across each of the plurality of unit cells.

11. The capacitive sensor array of claim 9, wherein each of the plurality of primary subtraces corresponds to one of the plurality of unit cells.

12. The capacitive sensor array of claim 9, wherein a first subtrace of the plurality of primary subtraces has a different length than a second subtrace of the plurality of primary subtraces.

13. The capacitive sensor array of claim 9, wherein at least one of the plurality of primary subtraces is parallel to another of the plurality of primary subtraces branching from a same side of the main trace, and wherein the at least one primary subtrace is substantially orthogonal to the main trace at a junction between the at least one primary subtrace and the main trace.

14. The capacitive sensor array of claim 9, further comprising one or more dummy traces situated between a first subtrace of the plurality of primary subtraces and a second subtrace of the plurality of primary subtraces, wherein each of the one or more dummy traces comprises conductive material that is electrically isolated from both the first plurality of sensor elements and the second sensor element.

15. The capacitive sensor array of claim 9, comprising one or more bridges joining portions of at least one core trace.

16. The capacitive sensor array of claim 9, further comprising one or more dummy traces situated between at least one of the first plurality of sensor elements and the second sensor element, wherein the one or more dummy traces comprise conductive material that is electrically isolated from both the first plurality of sensor elements and the second sensor element.

17. A capacitive touch-sensing system, comprising:

a capacitive sensor array, comprising;

a first plurality of sensor elements, wherein each of the first plurality of sensor elements comprises a core trace, wherein for each sensor element of the first plurality of sensor elements, the core trace of the sensor element is wider than any other trace of the sensor element, and a second sensor element comprising a main trace, wherein the main trace intersects the core trace of each of the first plurality of sensor elements at a corresponding bridge to form a plurality of unit cells, wherein each of the plurality of unit cells designates an area corresponding to an intersection between the second sensor element and one of the first plurality of sensor elements, wherein a contiguous section of the main trace crosses at least one of the plurality of unit cells, and wherein, within each unit cell, the second sensor element comprises at least one primary subtrace branching away from the main trace; and

a capacitance sensor coupled with the capacitive sensor array, wherein the capacitance sensor is configured to measure a mutual capacitance for each intersection between the second sensor element and one of the first plurality of sensor elements.

18. The capacitive touch-sensing system of claim 17, wherein the at least one primary subtrace is substantially orthogonal to the main trace at a junction between each of the at least one primary subtrace and the main trace.

19. The capacitive touch-sensing system of claim 17, wherein the at least one primary subtrace comprises at least two primary subtraces branching away from the main trace from opposite sides of the main trace, and wherein the at least two primary subtraces are symmetrical about an axis of symmetry extending along a portion of the main trace.

20. The capacitive touch-sensing system of claim 17, further comprising one or more dummy traces situated between the second sensor element and at least one of the first plurality of sensor elements, wherein the one or more dummy traces comprise conductive material that is electrically isolated from both the first plurality of sensor elements and the second sensor element.