Heterostructure power transistor with AlSiN passivation layer
First Claim
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1. A heterostructure power transistor comprising:
- a first active layer,a second active layer disposed on the first active layer, a two-dimensional electron gas layer forming between the first and second active layers;
a passivation/gate dielectric layer comprising aluminum silicon nitride (AlSiN) disposed on the second active layer;
an AlN layer disposed above the passivation/gate dielectric layer;
a gate;
a second gate dielectric layer disposed on the AlN layer, the gate being disposed above the second gate dielectric layer;
first and second ohmic contacts that electrically connect to the second active layer, the first and second ohmic contacts being laterally spaced-apart, the gate being disposed between the first and second ohmic contacts.
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Abstract
A heterostructure semiconductor device includes a first active layer and a second active layer disposed on the first active layer. A two-dimensional electron gas layer is formed between the first and second active layers. An AlSiN passivation layer is disposed on the second active layer. First and second ohmic contacts electrically connect to the second active layer. The first and second ohmic contacts are laterally spaced-apart, with a gate being disposed between the first and second ohmic contacts.
138 Citations
23 Claims
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1. A heterostructure power transistor comprising:
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a first active layer, a second active layer disposed on the first active layer, a two-dimensional electron gas layer forming between the first and second active layers; a passivation/gate dielectric layer comprising aluminum silicon nitride (AlSiN) disposed on the second active layer; an AlN layer disposed above the passivation/gate dielectric layer; a gate; a second gate dielectric layer disposed on the AlN layer, the gate being disposed above the second gate dielectric layer; first and second ohmic contacts that electrically connect to the second active layer, the first and second ohmic contacts being laterally spaced-apart, the gate being disposed between the first and second ohmic contacts. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 22, 23)
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14. A method of fabricating a heterostructure semiconductor device comprising:
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forming a first active layer on a substrate; forming a second active layer on the first active layer, the first active layer and the second active layer having different bandgaps such that a two-dimensional electron gas layer is formed therebetween; forming a passivation/gate dielectric layer comprising aluminum silicon nitride (AlSiN) on the second active layer, the passivation/gate dielectric layer having a first thickness, wherein the forming of the passivation/gate dielectric layer comprises growing in-situ with the AlSiN layer an AlN layer on top of the AlSiN layer; forming a second gate dielectric layer of aluminum oxide over the passivation/gate dielectric layer using the AlN layer as a seed layer; forming first and second ohmic contacts that each extend vertically through the passivationfgate dielectric layer, the first and second ohmic contacts being laterally spaced-apart and electrically connected to the second active layer; and forming a gate at a lateral position between the first and second ohmic contacts. - View Dependent Claims (15, 16, 17, 18, 19, 20, 21)
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Specification