Portable handheld device with multi-core image processor
First Claim
1. A device comprising:
- an image sensor providing signals generating image data associated with an image; and
a processor having integrated on a common wafer a CPU, a multi-core processor for processing image data associated with the image, and a common synchronization register, whereinthe multi-core processor includes multiple processing units connected in parallel,each of the multiple processing units storing one or more synchronization bits for identifying other processing units that are functioning together to process the image data therewith, andthe common synchronization register contains therein synchronization bits from each of the multiple processing units;
wherein the CPU is configured to load each of the multiple processing units with instructions; and
wherein the CPU is configured to write the synchronization bits from each of the multiple processing units to the common synchronization register upon completion of the loading of instructions to all of the multiple processing units.
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Accused Products
Abstract
A portable handheld device includes an image sensor for capturing an image; an orientation sensor for determining a rotation of the image sensor; and a system-on-chip processor having integrated on a common wafer a CPU for processing a script language, a multi-core processor for processing an image captured by the image sensor, and a common synchronization register. The multi-core processor includes multiple processing units connected in parallel by a crossbar switch. Each processing unit stores one or more synchronization bits for identifying which of the other processing units are functioning as a single process therewith. The common synchronization register contains therein synchronization bits from each of the processing units.
1725 Citations
8 Claims
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1. A device comprising:
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an image sensor providing signals generating image data associated with an image; and a processor having integrated on a common wafer a CPU, a multi-core processor for processing image data associated with the image, and a common synchronization register, wherein the multi-core processor includes multiple processing units connected in parallel, each of the multiple processing units storing one or more synchronization bits for identifying other processing units that are functioning together to process the image data therewith, and the common synchronization register contains therein synchronization bits from each of the multiple processing units; wherein the CPU is configured to load each of the multiple processing units with instructions; and wherein the CPU is configured to write the synchronization bits from each of the multiple processing units to the common synchronization register upon completion of the loading of instructions to all of the multiple processing units. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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Specification