Wireless power transfer via data signal
First Claim
1. A receiver for wireless power transfer via a data signal, comprising:
- a receiver memory bank including a plurality of memory storage devices coupled to a plurality of memory buses;
a decoder configured to;
decode a wireless data signal received by the receiver to extract charging data therefrom, andwrite the charging data to the plurality of memory storage devices;
a charge controller configured to cause the plurality of memory storage devices to output portions of the charging data on the plurality of memory busses;
a voltage conversion circuit coupled to the plurality of memory busses configured to produce partial charging signals from the portions of charging data received on the plurality of memory busses; and
a voltage aggregator configured to aggregate the partial charging signals to generate a charging signal.
1 Assignment
0 Petitions
Accused Products
Abstract
A system for wireless power transfer via a data signal including a transmitter configured to generate and transmit a wireless data signal that includes charging data to a receiver. The receiver includes a receiver memory bank including memory storage devices coupled to memory buses. The receiver includes a decoder configured to decode the wireless data signal received by the receiver to extract charging data therefrom, and write the charging data to the memory storage devices. The receiver includes a charge controller configured to cause the memory storage devices to output portions of the charging data on the memory busses. The receiver includes a voltage conversion circuit coupled to the memory busses configured to produce partial charging signals from the portions of charging data received on the memory busses. The receiver includes a voltage aggregator configured to aggregate the partial charging signals to generate a charging signal.
12 Citations
20 Claims
-
1. A receiver for wireless power transfer via a data signal, comprising:
-
a receiver memory bank including a plurality of memory storage devices coupled to a plurality of memory buses; a decoder configured to; decode a wireless data signal received by the receiver to extract charging data therefrom, and write the charging data to the plurality of memory storage devices; a charge controller configured to cause the plurality of memory storage devices to output portions of the charging data on the plurality of memory busses; a voltage conversion circuit coupled to the plurality of memory busses configured to produce partial charging signals from the portions of charging data received on the plurality of memory busses; and a voltage aggregator configured to aggregate the partial charging signals to generate a charging signal. - View Dependent Claims (2, 3, 4, 5, 6, 7)
-
-
8. A transmitter for wireless power transfer via a data signal, comprising:
-
a transmitter memory bank that includes a plurality of memory storage devices that store charging data and are scaled relative to a plurality of memory storage devices in a corresponding receiver; an encoder configured to generate an information signal using portions of the charging data in the transmitter memory bank; a signal generator configured to generate a carrier signal; a modulator configured to modulate the carrier signal with the information signal to generate the data signal; and an antenna coupled to the modulator that wirelessly transmits the data signal to the corresponding receiver, the receiver adapted to store charging data derived from the data signal in the plurality of memory storage devices in the receiver. - View Dependent Claims (9, 10, 11, 12, 13, 14)
-
-
15. A system for wireless power transfer via a data signal, comprising:
-
a transmitter configured to generate and transmit a wireless data signal that includes charging data; and a receiver configured to receive the wireless data signal, the receiver comprising; a receiver memory bank including a plurality of memory storage devices coupled to a plurality of memory buses; a decoder configured to; decode the wireless data signal received by the receiver to extract charging data therefrom, and write the charging data to the plurality of memory storage devices; a charge controller configured to cause the plurality of memory storage devices to output portions of the charging data on the plurality of memory busses, a voltage conversion circuit coupled to the plurality of memory busses configured to produce partial charging signals from the portions of charging data received on the plurality of memory busses, and a voltage aggregator configured to aggregate the partial charging signals to generate a charging signal. - View Dependent Claims (16, 17, 18, 19, 20)
-
Specification