Semiconductor device and method for manufacturing the same

• US 8,988,623 B2
• Filed: 10/26/2010
• Issued: 03/24/2015
• Est. Priority Date: 10/30/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Koyama, Jun, Yamazaki, Shunpei
• Primary Examiner(s): Briggs, Nathanael R
• Application Number:
  US12/912,076
• Publication Number:
  US 20110102697A1
• Time in Patent Office: 1,610 Days
• Field of Search: 349/149
• US Class Current: 349/43
• CPC Class Codes: G02F 1/13306 Circuit arrangements or driving methods for the control of single liquid crystal cells G02F1/132, G02F1/133382 take precedence
• CPC Class Codes: G02F 1/133302 Rigid substrates, e.g. inorganic substrates
• CPC Class Codes: G02F 1/133345 Insulating layers G02F1/1335, G02F1/1337, G02F1/135, G02F1/136 take precedence
• CPC Class Codes: G02F 1/133357 Planarisation layers
• CPC Class Codes: G02F 1/133388 with constructional differences between the display region and the peripheral region
• CPC Class Codes: G02F 1/133512 Light shielding layers, e.g. black matrix G02F1/136209 takes precedence
• CPC Class Codes: G02F 1/133742 for homeotropic alignment
• CPC Class Codes: G02F 1/133784 by rubbing
• CPC Class Codes: G02F 1/1339 Gaskets; Spacers; Sealing of cells
• CPC Class Codes: G02F 1/13394 spacers regularly patterned on the cell subtrate, e.g. walls, pillars G02F1/133377 takes precedence
• CPC Class Codes: G02F 1/134309 characterised by their geometrical arrangement
• CPC Class Codes: G02F 1/134336 Matrix
• CPC Class Codes: G02F 1/13439 characterised by their electrical, optical, physical properties; materials therefor; method of making
• CPC Class Codes: G02F 1/13454 Drivers integrated on the active matrix substrate G02F1/136277 takes precedence
• CPC Class Codes: G02F 1/1362 Active matrix addressed cells G02F1/134336, G02F1/134363 take precedence
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: G02F 1/137 characterised by the electro-optical or magneto-optical effect, e.g. field-induced phase transition, orientation effect, guest-host interaction or dynamic scattering
• CPC Class Codes: G02F 1/13793 Blue phases
• CPC Class Codes: G02F 2201/121 common or background
• CPC Class Codes: G02F 2201/123 : pixel

Abstract

When a pixel portion and a driver circuit are formed over one substrate and a counter electrode is formed over an entire surface of a counter substrate, the driver circuit may be adversely affected by an optimized voltage of the counter electrode. A semiconductor device according to the present invention has a structure in which: a liquid crystal layer is provided between a pair of substrates; one of the substrates is provided with a pixel electrode and a driver circuit; the other of the substrates is a counter substrate which is provided with two counter electrode layers in different potentials; and one of the counter electrode layers overlaps with the pixel electrode with the liquid crystal layer therebetween and the other of the counter electrode layers overlaps with the driver circuit with the liquid crystal layer therebetween. An oxide semiconductor layer is used for the driver circuit.

Claims

1. A semiconductor device comprising:

a first electrode layer and a second electrode layer over a first substrate;

a liquid crystal layer over the first electrode layer and the second electrode layer;

a first counter electrode layer and a second counter electrode layer over the liquid crystal layer;

a second substrate over the first counter electrode layer and the second counter electrode layer; and

a transistor in a driver circuit, the transistor comprising;

a channel formation region including an oxide semiconductor, the channel formation region comprising a first region; and

a source region including the oxide semiconductor, the source region comprising a second region,

wherein a concentration of oxygen in the first region is higher than a concentration of oxygen in the second region,

wherein the oxide semiconductor in the channel formation region is substantially an i-type oxide semiconductor,

wherein at least a part of the oxide semiconductor in the channel formation region includes crystal,

wherein the first electrode layer is a pixel electrode formed in a position overlapping with the first counter electrode layer with the liquid crystal layer therebetween,

wherein the second electrode layer is an electrode layer of the driver circuit formed in a position overlapping with the second counter electrode layer with the liquid crystal layer therebetween, and

wherein the semiconductor device is configured to set a potential of the second counter electrode layer to a ground potential.

2. The semiconductor device according to claim 1, wherein a potential of the first counter electrode layer is different from a potential of the second counter electrode layer.

3. The semiconductor device according to claim 1, wherein the first electrode layer is electrically connected to a transistor in a pixel portion.

4. The semiconductor device according to claim 1, wherein the second electrode layer is a gate electrode layer of the transistor of the driver circuit.

5. The semiconductor device according to claim 1 further comprising:

a third electrode layer over the first substrate; and

a conductive particle between the third electrode layer and the first counter electrode layer,

wherein the third electrode layer is electrically connected to the first counter electrode layer through the conductive particle.

6. The semiconductor device according to claim 1 further comprising:

a fourth electrode layer over the first substrate; and

a conductive particle between the fourth electrode layer and the second counter electrode layer,

wherein the fourth electrode layer is electrically connected to the second counter electrode layer through the conductive particle.

12. The semiconductor device according to claim 1, wherein the liquid crystal layer comprises a liquid crystal exhibiting a blue phase.

14. The semiconductor device according to claim 1,

wherein the second counter electrode layer includes a branching comb-like portion, and

wherein the second counter electrode layer overlaps with the transistor.

16. The semiconductor device according to claim 1, wherein the first region is in an oxygen-excess state.

18. The semiconductor device according to claim 1, wherein the transistor is a normally-off transistor.

20. The semiconductor device according to claim 16, wherein the oxide semiconductor includes indium, zinc and a metal other than indium and zinc.

22. The semiconductor device according to claim 1,

wherein the transistor comprises a first gate electrode under the channel formation region, and

wherein a part of the second electrode layer is configured to be a second gate electrode of the transistor.

7. A semiconductor device comprising:

a first electrode layer, a second electrode layer, a third electrode layer, and a fourth electrode layer over a first substrate;

a liquid crystal layer over the first electrode layer and the second electrode layer;

a first counter electrode layer and a second counter electrode layer over the liquid crystal layer;

a second substrate over the first counter electrode layer and the second counter electrode layer;

a first connection terminal electrically connected to the first counter electrode layer;

a second connection terminal electrically connected to the first counter electrode layer; and

a third connection terminal electrically connected to the second counter electrode layer,

a transistor in a driver circuit, the transistor comprising;

a channel formation region including an oxide semiconductor, the channel formation region comprising a first region; and

a source region including the oxide semiconductor, the source region comprising a second region,

wherein a concentration of oxygen in the first region is higher than a concentration of oxygen in the second region,

wherein the oxide semiconductor in the channel formation region is substantially an i-type oxide semiconductor,

wherein at least a part of the oxide semiconductor in the channel formation region includes crystal,

wherein the third electrode layer is electrically connected to the first counter electrode layer through a first conductive particle,

wherein the fourth electrode layer is electrically connected to the first counter electrode layer through a second conductive particle,

wherein the first electrode layer is a pixel electrode formed in a position overlapping with the first counter electrode layer with the liquid crystal layer therebetween, and

wherein the second electrode layer is an electrode layer of the driver circuit formed in a position overlapping with the second counter electrode layer with the liquid crystal layer therebetween.

8. The semiconductor device according to claim 7, wherein a potential of the first counter electrode layer is different from a potential of the second counter electrode layer.

9. The semiconductor device according to claim 7, wherein the first electrode layer is electrically connected to a transistor in a pixel portion.

10. The semiconductor device according to claim 7, wherein the second electrode layer is a gate electrode layer of the transistor of the driver circuit.

11. The semiconductor device according to claim 7 further comprising:

a fifth electrode layer over the first substrate; and

a third conductive particle between the fourth electrode layer and the second counter electrode layer,

wherein the fifth electrode layer is electrically connected to the second counter electrode layer through the third conductive particle.

13. The semiconductor device according to claim 7, wherein the liquid crystal layer comprises a liquid crystal exhibiting a blue phase.

15. The semiconductor device according to claim 7,

wherein the second counter electrode layer includes a branching comb-like portion, and

wherein the second counter electrode layer overlaps with the transistor.

17. The semiconductor device according to claim 7, wherein the first region is in an oxygen-excess state.

19. The semiconductor device according to claim 7, wherein the transistor is a normally-off transistor.

21. The semiconductor device according to claim 17, wherein the oxide semiconductor includes indium, zinc and a metal other than indium and zinc.

23. The semiconductor device according to claim 7,

wherein the transistor comprises a first gate electrode under the channel formation region, and

wherein a part of the second electrode layer is configured to be a second gate electrode of the transistor.