Liquid crystal display device and method for driving the same

• US 8,994,631 B2
• Filed: 12/28/2006
• Issued: 03/31/2015
• Est. Priority Date: 06/30/2006
• Status: Active Grant

• Current Assignee: LG Display Co., Ltd.
• Original Assignee: LG Display Co., Ltd.
• Inventors: Chun, Min Doo, Cho, Nam Wook, Yoon, Soo Young, Choi, Seung Chan
• Primary Examiner(s): Mengistu, Amare
• Assistant Examiner(s): Rodriguez, Joseph G
• Application Number:
  US11/646,271
• Publication Number:
  US 20080001889A1
• Time in Patent Office: 3,015 Days
• Field of Search: 345/96, 345/89
• US Class Current: 345/96
• CPC Class Codes: G09G 2320/0247 Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
• CPC Class Codes: G09G 3/2011 by amplitude modulation
• CPC Class Codes: G09G 3/3614 Control of polarity reversal in general

Abstract

An LCD device includes at least one data line, a plurality of first pixel cells connected in common to one side of the data line, a timing controller for alternately outputting first and second-polarity data signals at intervals of at least two successive periods, a data modulator for outputting the first and second-polarity data signals supplied from the timing controller, the data modulator modulating a grayscale value of one of the first and second-polarity data signals respectively supplied in two successive periods from the timing controller, and outputting the modulated data signal, and a data driver for receiving the first and second-polarity data signals from the data modulator, and alternately outputting the first and second-polarity data signals at intervals of at least two successive periods, to supply the first and second-polarity data signals to the data line.

Claims

1. A liquid crystal display device comprising:

at least one data line;

a plurality of first pixel cells connected in common to one side of the data line, and sequentially driven in accordance with gate signals respectively output from first gate lines in every period;

a timing controller for alternately outputting first and second-polarity data signals for display of an image, at intervals of at least two successive periods;

a data modulator for outputting the first and second-polarity data signals supplied from the timing controller, the data modulator modulating a grayscale value of one of the first and second-polarity data signals respectively supplied in two successive periods from the timing controller, and outputting the modulated data signal; and

a data driver for receiving the first and second-polarity data signals from the data modulator, and alternately outputting the first and second-polarity data signals at intervals of at least two successive periods, to supply the first and second-polarity data signals to the data line;

wherein the data modulator comprises;

a storage for receiving a plurality of first and second-polarity data signals associated with one frame period from the timing controller, and storing the received first and second-polarity data signals;

a determinator for determining whether or not grayscale values of all first and second-polarity data signals stored in the storage are identical;

a lookup table stored with respective grayscale values for the first and second-polarity data signals;

a corrector for selecting a desired grayscale value from the lookup table, based on a result of the determination from the determinator, and correcting the grayscale value of one of the first and second-polarity data signals respectively supplied in two successive periods when the result of the determination from the determinator indicates that the respective grayscale values for all the first and second-polarity data signals stored in the storage are identical;

a data aligning/outputting unit for aligning the corrected data signal from the corrector with the first and second-polarity data signals from the storage, and alternately outputting the aligned first and second-polarity data signals at intervals of at least two successive periods;

a plurality of second pixel cells connected in common to the other side of the data line and sequentially driven in accordance with gate signals respectively output from second gate lines in every period,

wherein the first pixel cells and the second pixel cells are alternately driven; and

first and second gate drivers located respectively at first and second sides of the display device, the first and second sides opposite to each other relative to a display area of the display device,

the first gate driver configured to drive the first gate lines with the gate signals output from the first gate lines to the plurality of first pixel cells, and the second gate driver configured to drive the second gate lines with the gate signals output from the second gate lines to the plurality of second pixel cells,

wherein the first and second gate lines receive scan pulses from opposite directions and are alternately driven by the first and second gate drivers.

2. The liquid crystal display device according to claim 1, wherein:

the at least one data line comprises a plurality of data lines;

the data driver outputs the first and second-polarity data signals to odd numbered data lines at intervals of at least two successive periods to supply the first and second-polarity data signals to each data line; and

the data driver outputs, to even numbered data lines, a data signal having a polarity opposite to a polarity of the data signal supplied to the odd data lines.

3. The liquid crystal device according to claim 1, wherein one of the first and second-polarity data signals is a positive data signal, and the other of the first and second-polarity data signals is a negative data signal.

4. The liquid crystal device according to claim 1, wherein the data modulator modulates the grayscale value of the one of the first and second-polarity data signals respectively supplied in the two successive periods to a level higher or lower than an original grayscale value by 1 to 10 levels.

5. A method for driving a liquid crystal display device including at least one data line, a plurality of first pixel cells connected in common to one side of the data line, and sequentially driven in accordance with gate signals respectively output from first gate lines in every period, and a plurality of second pixel cells connected in common to the other side of the data line and sequentially driven in accordance with gate signals respectively output from second gate lines in every period, wherein the first pixel cells and the second pixel cells are alternately driven, and a timing controller for alternately outputting first and second-polarity data signals for display of an image, at intervals of at least two successive periods, comprising:

modulating a grayscale value of one of the first and second-polarity data signals respectively supplied in two successive periods from the timing controller, for all the first and second-polarity data signals supplied from the time controller; and

alternately outputting the resultant first and second-polarity data signals at intervals of at least two successive periods, to supply the first and second-polarity data signals to the data line;

wherein the step of modulating the data signals comprises;

receiving a plurality of first and second-polarity data signals associated with one frame period from the timing controller, and storing the received first and second-polarity data signals;

determining whether or not grayscale values of all the stored first and second-polarity data signals are identical;

selecting a desired grayscale value from a lookup table, based on a result of the determination, and correcting the grayscale value of one of the first and second-polarity data signals respectively supplied in two successive periods when the result of the determination indicates that the grayscale values of all the stored first and second-polarity data signals are identical; and

aligning the corrected data signal with the stored first and second-polarity data signals, and alternately outputting the aligned first and second-polarity data signals at intervals of at least two successive periods;

driving the first gate lines with gate signals output from a first gate driver located at a first side of the display device;

driving the second gate lines with gate signals output from a second gate driver located at a second side of the display device, the first and second sides being opposite to each other relative to a display area of the display device,

the first and second gate lines receiving scan pulses from opposite directions and being alternately driven by the first and second gate drivers.

6. The liquid crystal device according to claim 5, wherein the grayscale value of the one of the first and second-polarity data signals is modulated to a level higher or lower than an original grayscale value by 1 to 10 levels.