Data shifting via a number of isolation devices

• US 9,019,785 B2
• Filed: 09/19/2013
• Issued: 04/28/2015
• Est. Priority Date: 09/19/2013
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Cowles, Timothy B., Bodily, Steven M.
• Primary Examiner(s): MAI, SON LUU
• Application Number:
  US14/031,432
• Publication Number:
  US 20150078108A1
• Time in Patent Office: 586 Days
• Field of Search: 365/189.17
• US Class Current: 365/189.17
• CPC Class Codes: G11C 11/4091 Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
• CPC Class Codes: G11C 19/00 Digital stores in which the information is moved stepwise, e.g. shift registers
• CPC Class Codes: G11C 2207/002 Isolation gates, i.e. gates coupling bit lines to the sense amplifier
• CPC Class Codes: G11C 2207/005 Transfer gates, i.e. gates coupling the sense amplifier output to data lines, I/O lines or global bit lines
• CPC Class Codes: G11C 5/06 Arrangements for interconnecting storage elements electrically, e.g. by wiring
• CPC Class Codes: G11C 7/06 Sense amplifiers; Associated circuits , e.g. timing or triggering circuits
• CPC Class Codes: G11C 7/065 Differential amplifiers of latching type
• CPC Class Codes: G11C 7/08 Control thereof
• CPC Class Codes: G11C 7/1006 Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
• CPC Class Codes: G11C 7/1036 using data shift registers
• CPC Class Codes: G11C 7/22 Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
• CPC Class Codes: G11C 8/10 Decoders

Abstract

The present disclosure includes apparatuses and methods related to data shifting. An example apparatus comprises a first memory cell coupled to a first sense line of an array, a first isolation device located between the first memory cell and first sensing circuitry corresponding thereto, and a second isolation device located between the first memory cell and second sensing circuitry corresponding to a second sense line. The first and the second isolation devices are operated to shift data in the array without transferring the data via an input/output line of the array.

Claims

1. An apparatus for data shifting, comprising:

a first memory cell coupled to a first sense line of an array;

a first isolation device located between the first memory cell and first sensing circuitry corresponding thereto; and

a second isolation device located between the first memory cell and second sensing circuitry corresponding to a second sense line;

wherein the first and the second isolation devices are operated to shift data in the array without transferring the data via an input/output line of the array.

2. The apparatus of claim 1, further comprising a third isolation device located between the second sensing circuitry and a second memory cell coupled to the second sense line.

3. The apparatus of claim 2, further comprising a fourth isolation device located between the first sensing circuitry and a third memory cell coupled to a third sense line of the array.

4. The apparatus of claim 3, further comprising a fifth isolation device located between the third memory cell and third sensing circuitry corresponding thereto.

5. The apparatus of claim 4, wherein:

a first node of the first isolation device and a first node of the second isolation device are coupled to each other and to the first sense line;

a second node of the first isolation device and a first node of the fourth isolation device are coupled to each other and to a sense amplifier of the first sensing circuitry; and

a second node of the second isolation device and a first node of the third isolation device are coupled to each other and to a sense amplifier of the second sensing circuitry.

6. The apparatus of claim 5, further comprising a controller configured to:

provide a first control signal to a gate of the first isolation device and to a gate of the third isolation device; and

provide a second control signal to a gate of the second isolation device and to a gate of the fourth isolation device.

7. The apparatus of claim 6, further comprising:

a sixth isolation device located between the first memory cell and the third sensing circuitry, wherein a first node of the sixth isolation device is coupled to the first node of the first isolation device, and wherein a second node of the sixth isolation device and a second node of the fifth isolation device are coupled to each other and to the third sensing circuitry; and

a seventh isolation device located between the third memory cell and the first sensing circuitry, wherein a first node of the seventh isolation device is coupled to the second node of the first isolation device and to the first sensing circuitry, and wherein a second node of the seventh isolation device is coupled to a second node of the third isolation device.

8. The apparatus of claim 7, wherein the controller is configured to provide a third control signal to a gate of the sixth isolation device and to a gate of the seventh isolation device in association with shifting data in the array.

9. The apparatus of claim 6, further comprising:

a sixth isolation device located between the first memory cell and the third sensing circuitry, wherein a first node of the sixth isolation device is coupled to the first node of the first isolation device, and wherein a second node of the sixth isolation device and a second node of the fifth isolation device are coupled to each other and to the third sensing circuitry; and

a seventh isolation device located between the second memory cell and the first sensing circuitry, wherein a first node of the seventh isolation device is coupled to the second node of the first isolation device and to the first sensing circuitry, and wherein a second node of the seventh isolation device is coupled to a second node of the third isolation device.

10. The apparatus of claim 5, wherein the sense amplifier of the first sensing circuitry is coupled to a first accumulator and the sense amplifier of the second sending circuitry is coupled to a second accumulator.

11. The apparatus of claim 10, wherein at least one of the first accumulator and the second accumulator provides temporary storage for shifting data in the array and are formed on pitch with memory cells of the array.

12. The apparatus of claim 1, further comprising:

a third memory cell coupled to a first complementary sense line;

a third isolation device located between the third memory cell and the first sensing circuitry; and

a fourth isolation device located between the third memory cell and the second sensing circuitry.

13. The apparatus of claim 1, wherein the first sense line is adjacent to the second sense line.

14. The apparatus of claim 1, wherein the first and the second isolation devices are operated to shift data in the array along a selected access line without transferring the data via the input/output line of the array.

15. A method for data shifting, comprising:

sensing a data value stored in a memory cell coupled to a first sense line and to a particular access line; and

shifting the sensed data value to a memory cell coupled to a second sense line by;

enabling an isolation device coupled to the first sense line and to the second sense line; and

activating a selected access line;

wherein shifting the sensed data value to the memory cell coupled to the second sense line comprises transferring the sensed data value from sensing circuitry coupled to the first sense line to the memory cell coupled to the second sense line without transferring the sensed data value to sensing circuitry coupled to the second sense line; and

wherein the sensing circuitry coupled to the first sense line comprises a first sense amplifier and a first accumulator, and the sensing circuitry coupled to the second sense line comprises a second sense amplifier and a second accumulator, and wherein the method includes transferring the sensed data value from the first accumulator to the memory cell coupled to the second sense line upon activation of the selected access line while the isolation device is enabled.

16. The method of claim 15, wherein the isolation device is a transistor having a first node coupled to the first sense line and a second node coupled to the second sense line, and wherein enabling includes providing a signal to a gate of the transistor.

17. The method of claim 16, wherein the first sense line is one of a pair of complementary sense lines and the second sense line is one of a pair of complementary sense lines, and wherein providing the signal to the gate of the transistor comprises providing the signal to a gate of another transistor coupled to a complementary sense line of the first sense line and to a complementary sense line of the second sense line.

18. The method of claim 15, wherein the second sense line is not adjacent to the first sense line.

19. The method of claim 15, further comprising shifting the sensed data value to a memory cell coupled to a sense line other than the second sense line.

20. The method of claim 15, further comprising shifting the sensed data value to the memory cell coupled to the second sense line via execution of a single sensing operation.

38. The method of claim 15, including activating the selected access line while the isolation device is enabled.

21. A method for shifting a data value stored in a memory cell to an adjacent memory cell, the method comprising:

for shifting the data value in a first direction;

sensing the data value stored in the memory cell by enabling a first isolation device located between the memory cell and sensing circuitry corresponding to a sense line to which the memory cell is coupled; and

enabling a second isolation device located between the sensing circuitry corresponding to the sense line to which the memory cell is coupled and an adjacent memory cell in the first direction to write the data value to the adjacent memory cell in the first direction; and

for shifting the data value in a second direction;

sensing the data value stored in the memory cell by enabling a third isolation device located between the memory cell and sensing circuitry corresponding to an adjacent sense line to which the adjacent memory cell in the second direction is coupled; and

enabling a fourth isolation device located between the adjacent memory cell in the second direction and the sensing circuitry corresponding to the adjacent sense line to write the data value from the sensing circuitry corresponding to the adjacent sense line to the adjacent memory cell in the second direction.

22. An apparatus for data shifting, comprising:

an array of memory cells;

sensing circuitry coupled to a number of sense lines of the array;

a first isolation device located between the sensing circuitry corresponding to a particular sense line and memory cells coupled to the particular sense line;

a second isolation device located between the memory cells coupled to the particular sense line and the sensing circuitry corresponding to an adjacent sense line;

a third isolation device located between the sensing circuitry corresponding to the particular sense line and memory cells coupled to an opposite adjacent sense line; and

a controller coupled to the array and configured to selectively enable the first isolation device, the second isolation device, and the third isolation device via control signals to facilitate shifting of data along a selected access line of the array.

23. The apparatus of claim 22, wherein the controller is configured to facilitate shifting of data along the selected access line from a memory cell coupled to the particular sense line to a memory cell coupled to the opposite adjacent sense line by:

enabling the first isolation device in association with sensing, via the sensing circuitry corresponding to the particular sense line, a data value stored in the memory cell coupled to the particular sense line; and

subsequently enabling the third isolation device to transfer the data value from the sensing circuitry corresponding to the particular sense line to the memory cell coupled to the opposite adjacent sense line.

24. The apparatus of claim 22, wherein the controller is configured to facilitate shifting of data along the selected access line from a memory cell coupled to the particular sense line to a memory cell coupled to the adjacent sense line by:

enabling the second isolation device in association with sensing, via the sensing circuitry corresponding to the adjacent sense line, a data value stored in the memory cell coupled to the particular sense line; and

subsequently enabling an isolation device located between the sensing circuitry corresponding to the adjacent sense line and memory cells coupled to the adjacent sense line to transfer the data value from the sensing circuitry corresponding to the second sense line to the memory cell coupled to the adjacent sense line.

25. The apparatus of claim 22, wherein:

the first isolation device is located between a sense amplifier of the sensing circuitry corresponding to the particular sense line and memory cells coupled to the particular sense line

the second isolation device is located between the memory cells coupled to the particular sense line and a sense amplifier of the sensing circuitry corresponding to the adjacent sense line; and

the third isolation device is located between the sense amplifier of the sensing circuitry corresponding to the particular sense line and memory cells coupled to the opposite adjacent sense line.

26. The apparatus of claim 22, further comprising:

a fourth isolation device located between the sensing circuitry corresponding to the particular sense line and memory cells coupled to the adjacent sense line; and

a fifth isolation device located between the memory cells coupled to the particular sense line and sensing circuitry corresponding to the opposite adjacent sense line; and

wherein the controller is configured to selectively enable the fourth isolation device and the fifth isolation device via control signals to facilitate shifting of data along the selected access line.

27. The apparatus of claim 26, wherein:

a first node of the first isolation device is coupled to a first node of the second isolation device and to a first node of the fifth isolation device;

a second node of the first isolation device is coupled to a first node of the third isolation device and to a first node of the fourth isolation device.

28. The apparatus of claim 26, wherein the controller is configured to:

facilitate shifting of data along the selected access line from a memory cell coupled to the particular sense line to a memory cell coupled to the opposite adjacent sense line by;

enabling the first isolation device in association with sensing, via the sensing circuitry corresponding to the particular sense line, a data value stored in the memory cell coupled to the particular sense line; and

subsequently enabling the third isolation device to transfer the data value from the sensing circuitry corresponding to the particular sense line to the memory cell coupled to the opposite adjacent sense line; and

facilitate shifting of data along the selected access line from the memory cell coupled to the particular sense line to a memory cell coupled to the adjacent sense line by;

enabling the first isolation device in association with sensing, via the sensing circuitry corresponding to the particular sense line, the data value stored in the memory cell coupled to the particular sense line; and

subsequently enabling the fourth isolation device to transfer the data value from the sensing circuitry corresponding to the particular sense line to the memory cell coupled to the adjacent sense line.

29. The apparatus of claim 28, wherein the controller is configured to:

facilitate shifting of data along the selected access line from the memory cell coupled to the adjacent sense line to the memory cell coupled to the particular sense line by enabling the second isolation device to transfer a data value from the sensing circuitry corresponding to the adjacent sense line to the memory cell coupled to the particular sense line; and

facilitate shifting of data along the selected access line from the memory cell coupled to the opposite adjacent sense line to the memory cell coupled to the particular sense line by enabling the fifth isolation device to transfer a data value from the sensing circuitry corresponding to the opposite adjacent sense line to the memory cell coupled to the particular sense line.

30. The apparatus of claim 29, wherein the controller is configured to simultaneously provide a first control signal to the second isolation device and to the third isolation device in association with shifting data along the selected access line in a first direction.

31. The apparatus of claim 30, wherein the controller is configured to simultaneously provide a second control signal to the fourth isolation device and to the fifth isolation device in association with shifting data along the selected access line in a second direction.

32. The apparatus of claim 22, wherein the apparatus is configured to shift data along the selected access line of the array without transferring the data via an input/output line of the array and without performing a sense line address access.

33. The apparatus of claim 22, wherein the array comprises DRAM memory cells.

34. An apparatus for data shifting, comprising:

a number of first isolation devices coupled to a respective number of sense lines and located between memory cells of the sense lines and a respective number of sensing circuitries corresponding thereto;

a number of second isolation devices located between the respective number of sensing circuitries and memory cells of a respective number of adjacent sense lines; and

a controller configured to at least one of;

enable the number of second isolation devices to transfer data values from the number of sensing circuitries corresponding to the number of sense lines to memory cells of the respective number of adjacent sense lines without sensing the data values using sensing circuitries corresponding to the respective number of adjacent sense lines; and

enable the number of second isolation devices to transfer data values from memory cells of the respective number of adjacent sense lines to the number of sensing circuitries corresponding to the number of sense lines while the number of first isolation devices are disabled.

35. A method for data shifting, comprising:

sensing a data value stored in a memory cell coupled to a first sense line and to a particular access line; and

shifting the sensed data value to a memory cell coupled to a second sense line by;

enabling an isolation device coupled to the first sense line and to the second sense line; and

activating a selected access line;

wherein the isolation device is a transistor having a first node coupled to the first sense line and a second node coupled to the second sense line, and wherein enabling includes providing a signal to a gate of the transistor; and

wherein the first sense line is one of a pair of complementary sense lines and the second sense line is one of a pair of complementary sense lines, and wherein providing the signal to the gate of the transistor comprises providing the signal to a gate of another transistor coupled to a complementary sense line of the first sense line and to a complementary sense line of the second sense line.

36. The method of claim 35, wherein the selected access line is the particular access line.

37. The method of claim 35, including activating the selected access line while the isolation device is enabled.