Method for fabricating array substrate, array substrate and display device

• US 9,040,344 B2
• Filed: 12/13/2012
• Issued: 05/26/2015
• Est. Priority Date: 07/20/2012
• Status: Active Grant

• Current Assignee: BOE Technology Group Co., Ltd.
• Original Assignee: BOE Technology Group Co., Ltd.
• Inventors: Choi, Seungjin, Kim, Heecheol, Song, Youngsuk, Yoo, Seongyeol
• Primary Examiner(s): MOORE, WHITNEY
• Application Number:
  US13/984,090
• Publication Number:
  US 20140167031A1
• Time in Patent Office: 894 Days
• Field of Search: 438/104, 438/652, 438/658, 438/660, 438/666, 257/43
• US Class Current: 438/104
• CPC Class Codes: G02F 1/134363 for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
• CPC Class Codes: G02F 1/134372 for fringe field switching [FFS] where the common electrode is not patterned
• CPC Class Codes: G02F 1/136231 for reducing the number of lithographic steps
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02664 Aftertreatments planarisation in general H01L21/304
• CPC Class Codes: H01L 27/1203 the substrate comprising an insulating body on a semiconductor body, e.g. SOI three-dimensional layout H01L27/0688
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A method for fabricating array substrate, an array substrate and a display device. The method for fabricating the array substrate comprises forming a thin film transistor, a first transparent electrode (14) and a second transparent electrode (19), wherein a multi dimensional electric field is created by the first transparent electrode (17) and the second transparent electrode (19), wherein forming the first transparent electrode (17) comprises: forming a metal oxide film presenting semiconductor properties; forming the first transparent electrode (17) by subjecting a portion of the metal oxide film to metallization treatment, and forming a semiconductor active layer (141) from a portion which is not subjected to the metallization treatment.

Claims

1. A method for fabricating an array substrate, comprising forming a thin film transistor, a first transparent electrode and a second transparent electrode, wherein a multi dimensional electric field is created by the first transparent electrode and the second transparent electrode, wherein, forming the first transparent electrode comprises:

forming a metal oxide film presenting semiconductor properties;

forming the first transparent electrode by subjecting a portion of the metal oxide film to metallization treatment, and forming a semiconductor active layer from a portion which is not subjected to the metallization treatment,

wherein forming the thin film transistor, the first transparent electrode and the second transparent electrode comprises;

sequentially forming the metal oxide film and an etching barrier layer film on the substrate having a gate line, a gate electrode and a gate insulating layer formed thereon;

forming an etching barrier layer covering a TFT channel region by treating the etching barrier layer film with patterning process;

subjecting the metal oxide film not covered by the etching barrier layer to metallization treatment, to form a metal oxide film having conductor properties;

forming the semiconductor active layer from the portion of the metal oxide film that is covered by the etching barrier layer and is not subjected to the metallization treatment;

after the metallization treatment, forming the first transparent electrode and a source connecting electrode, a drain connecting electrode connected to the semiconductor active layer by etching the metal oxide film having conductor properties with a photoresist pattern thereon as a mask;

forming a source electrode, a drain electrode, a data line, a passivation layer and the second transparent electrode on the substrate having the semiconductor active layer, the etching barrier layer and the first transparent electrode formed thereon, wherein the source electrode is electrically connected to the source connecting electrode, and the drain electrode is electrically connected to the drain connecting electrode,

wherein,

the method further comprises forming the gate line, the gate electrode and a common electrode line on the substrate and forming a gate insulating layer on the substrate, the gate line, the gate electrode and the common electrode line, prior to sequentially forming the metal oxide film and the etching barrier layer film on the substrate having the gate line, the gate electrode and the gate insulating layer formed thereon;

forming the source electrode, the drain electrode, the data line, the passivation layer and the second transparent electrode on the substrate having the semiconductor active layer, the etching barrier layer and the first transparent electrode formed thereon comprises;

forming the data line, the source electrode, and the drain electrode electrically connected to the first transparent electrode on the substrate having the semiconductor active layer, the etching barrier layer and the first transparent electrode formed thereon, forming the passivation layer containing a first through hole, the first through hole passing through the passivation layer and the gate insulating layer so as to expose the common electrode line; and

forming the second transparent electrode on the passivation layer, the second transparent electrode being electrically connected to the common electrode line via the first through hole.

2. The method of claim 1, wherein forming the first transparent electrode by subjecting a portion of the metal oxide film to metallization treatment comprises:

forming the first transparent electrode by subjecting a portion of the metal oxide film to metallization treatment by plasma process or annealing process.

3. The method of claim 2, wherein the first transparent electrode is a pixel electrode or a common electrode.

4. The method of claim 1, wherein the metal oxide film is a transparent metal oxide material presenting semiconductor properties.

5. The method of claim 4, wherein the metal oxide material is InGaZnO, InGaO, ITZO, AlZnO.

6. An array substrate, fabricated by the method of claim 1.

7. A method for fabricating an array substrate, comprising forming a thin film transistor, a first transparent electrode and a second transparent electrode, wherein a multi dimensional electric field is created by the first transparent electrode and the second transparent electrode, wherein, forming the first transparent electrode comprises:

forming a metal oxide film presenting semiconductor properties;

forming the first transparent electrode by subjecting a portion of the metal oxide film to metallization treatment, and forming a semiconductor active layer from a portion which is not subjected to the metallization treatment,

wherein forming the thin film transistor, the first transparent electrode and the second transparent electrode comprises;

sequentially forming the metal oxide film and an etching barrier layer film on the substrate having a gate line, a gate electrode and a gate insulating layer formed thereon;

forming an etching barrier layer covering a TFT channel region by treating the etching barrier layer film with patterning process;

subjecting the metal oxide film not covered by the etching barrier layer to metallization treatment, to form a metal oxide film having conductor properties;

forming the semiconductor active layer from the portion of the metal oxide film that is covered by the etching barrier layer and is not subjected to the metallization treatment;

after the metallization treatment forming the first transparent electrode and a source connecting electrode, a drain connecting electrode connected to the semiconductor active layer by etching the metal oxide film having conductor properties with patterning process a photoresist pattern thereon as a mask;

forming a source electrode, a drain electrode, a data line, a passivation layer and the second transparent electrode on the substrate having the semiconductor active layer, the etching barrier layer and the first transparent electrode formed thereon, wherein the source electrode is electrically connected to the source connecting electrode, and the drain electrode is electrically connected to the drain connecting electrode,

wherein,

the method further comprises forming the gate line, the gate electrode, a common electrode line and a gate insulating layer on the substrate, and forming a second through hole on the gate insulating layer for connecting the first transparent electrode with the common electrode line, prior to sequentially forming the metal oxide film and the etching barrier layer film on the substrate having the gate line, the gate electrode and the gate insulating layer formed thereon;

forming the source electrode, the drain electrode, the data line, the passivation layer and the second transparent electrode on the substrate having the semiconductor active layer, the etching barrier layer and the first transparent electrode formed thereon comprises;

forming the source electrode, the drain electrode, and the data line on the substrate having the semiconductor active layer, the etching barrier layer and the first transparent electrode formed thereon;

forming the passivation layer containing a third through hole, the third through hole passing through the passivation layer so as to expose the drain electrode; and

forming the second transparent electrode on the passivation layer, the second transparent electrode being electrically connected to the drain electrode via the third through hole.

8. The method of claim 7, wherein forming the first transparent electrode by subjecting a portion of the metal oxide film to metallization treatment comprises:

forming the first transparent electrode by subjecting a portion of the metal oxide film to metallization treatment by plasma process or annealing process.

9. The method of claim 8, wherein the first transparent electrode is a pixel electrode or a common electrode.

10. The method of claim 7, wherein the metal oxide film is a transparent metal oxide material presenting semiconductor properties.

11. The method of claim 10, wherein the metal oxide material is InGaZnO, InGaO, ITZO, AlZnO.