Voltage monitor

• US 9,081,038 B2
• Filed: 10/04/2011
• Issued: 07/14/2015
• Est. Priority Date: 10/04/2011
• Status: Active Grant

• Current Assignee: Analog Devices, Inc.
• Original Assignee: Analog Devices, Inc.
• Inventors: Spalding, George Redfield Jr.
• Primary Examiner(s): Nguyen, Tung X
• Assistant Examiner(s): Astacio-Oquendo, Giovanni
• Application Number:
  US13/252,870
• Publication Number:
  US 20130082684A1
• Time in Patent Office: 1,379 Days
• Field of Search: 324/111, 324/76, 324/112, 324/120, 324/76.11, 341/33, 341/150, 341/172
• US Class Current: 1/1
• CPC Class Codes: G01R 15/06 having reactive components, e.g. capacitive transformer
• CPC Class Codes: G01R 19/0038 Circuits for comparing several input signals and for indicating the result of this comparison, e.g. equal, different, greater, smaller (comparing pulses or pulse trains according to amplitude)
• CPC Class Codes: G01R 19/2506 Arrangements for conditioning or analysing measured signals, e.g. for indicating peak values G01R19/003 takes precedence; Details concerning sampling, digitizing or waveform capturing displaying waveforms G01R13/00; analog sampling G01R19/0053
• CPC Class Codes: H03F 2203/45536 the FBC comprising a switch and being coupled between the LC and the IC
• CPC Class Codes: H03F 2203/45544 the IC comprising one or more capacitors, e.g. coupling capacitors
• CPC Class Codes: H03F 2203/45548 the IC comprising one or more capacitors as shunts to earth or as short circuit between inputs
• CPC Class Codes: H03F 2203/45594 the IC comprising one or more resistors, which are not biasing resistor
• CPC Class Codes: H03F 2203/45604 the IC comprising a input shunting resistor
• CPC Class Codes: H03F 2203/45616 the IC comprising more than one switch, which are not cross coupled
• CPC Class Codes: H03F 3/45475 using IC blocks as the active amplifying circuit

Abstract

A voltage monitor comprising a first capacitive potential divider for presenting an attenuated representation of an input voltage to a comparator.

Claims

1. A voltage monitor comprising:

a voltage reference circuit configured to be controllably de-powered and re-powered;

a sampling circuit coupled to the voltage reference circuit, the sampling circuit configured to;

sample a voltage provided by the voltage reference circuit when the voltage reference circuit is powered; and

hold a representation of the sampled voltage when the voltage reference circuit is de-powered;

a first capacitive circuit configured to provide a representation of an input voltage; and

a comparator circuit having first and second inputs, the first input of the comparator circuit coupled to the sampling circuit to receive the representation of the sampled voltage of the voltage reference and the second input of the comparator circuit coupled to the first capacitive circuit to receive the representation of the input voltage;

a switching circuit configured to sample an offset voltage at an output of the comparator circuit onto at least one capacitor included in the first capacitive circuit;

wherein the comparator circuit is configured to provide an output signal indicative of a comparison between the first and second inputs at least when the voltage reference circuit is de-powered;

wherein the output signal includes offset compensation provided using the sampled offset voltage; and

wherein the voltage reference circuit is configured to be re-powered in coordination with the sampling circuit for a stabilization duration before the sampling circuit samples the voltage provided by the voltage reference.

2. The voltage monitor as claimed in claim 1, further comprising electrically controlled devices for setting at least one capacitor included in the capacitive circuit to a predetermined state.

3. The voltage monitor as claimed in claim 2, in which the electrically controlled devices comprise transistors.

4. The voltage monitor as claimed in claim 2, further comprising a switching arrangement for selectively discharging at least one capacitor included in the capacitive circuit.

5. The voltage monitor as claimed in claim 1, wherein the sampling circuit comprises a second capacitive circuit, the second capacitive circuit configured to provide the representation of the voltage reference.

6. The voltage monitor as claimed in claim 5, wherein the second capacitive circuit comprises a capacitive divider circuit;

and

wherein the representation of the voltage reference further comprises an attenuated representation of the voltage provided by the voltage reference, the attenuated representation established using a relationship between capacitances provided by at least two capacitors included in the second capacitive circuit.

7. The voltage monitor as claimed in claim 6, wherein the second capacitive divider circuit includes at least one variable capacitor;

and

wherein the attenuated representation of the reference voltage is provided using an adjustable attenuation factor established using the at least one variable capacitor of the second capacitive divider circuit.

8. The voltage monitor as claimed in claim 5, wherein the sampling circuit further comprises a switching arrangement for selectively discharging the at least two capacitors of the second capacitive circuit.

9. The voltage monitor as claimed in claim 5, in which at least one of the first capacitive circuit or the second capacitive circuit includes a variable capacitor.

10. The voltage monitor as claimed in claim 5, wherein a controller is configured to adjust a capacitance of a variable capacitor included in the first capacitive circuit or the second capacitive circuit such that the sum of a capacitance of the first capacitive circuit is equal to the sum of a capacitance-of the second capacitive circuit.

11. The monitor as claimed in claim 1, in which the first capacitive circuit includes a variable capacitor.

12. The voltage monitor as claimed in claim 1, wherein the first capacitive circuit further comprises a first capacitive divider circuit;

and

wherein the representation of the input voltage further comprises an attenuated representation of the input voltage established using a relationship between capacitances provided by at least two capacitors included in the first capacitive divider circuit.

13. The voltage monitor as claimed in claim 12, wherein the first capacitive divider circuit includes at least one variable capacitor;

and

wherein the attenuated representation of the input voltage is provided using an adjustable attenuation factor established using the at least one variable capacitor of the first capacitive divider circuit.

14. A voltage monitor comprising:

a voltage reference circuit configured to be controllably de-powered and re-powered;

a first channel comprising;

a sampling circuit coupled to the voltage reference circuit, the sampling circuit configured to;

sample a voltage provided by the voltage reference circuit when the voltage reference circuit is powered; and

hold a representation of the sampled voltage when the voltage reference circuit is de-powered;

a first capacitive circuit configured to provide a representation of an input voltage; and

a first comparator circuit having first and second inputs, the first input of the comparator circuit coupled to the sampling circuit to receive the representation of the sampled voltage of the voltage reference and the second input of the first comparator circuit coupled to the first capacitive circuit to receive the representation of the input voltage;

a first switching circuit configured to sample an offset voltage at an output of the first comparator circuit onto at least one capacitor included in the first capacitive circuit;

wherein the first comparator circuit is configured to provide an output signal indicative of a comparison between the first and second inputs at least when the voltage reference circuit is de-powered;

wherein the output signal provided by the first comparator includes offset compensation provided using the sampled offset voltage;

wherein the voltage reference circuit is configured to be re-powered in coordination with the sampling circuit for a stabilization duration before the sampling circuit samples the voltage provided by the voltage reference;

wherein the voltage monitor includes a second channel including a second comparator; and

wherein the second channel including the second comparator is configured to provide the output signal when the first channel is being refreshed.

15. The voltage monitor as claimed in claim 14, wherein the first channel is configured to be coupled to the voltage reference when the first channel is being refreshed;

and

wherein the second channel is decoupled from the voltage reference when the first channel is being refreshed.

16. The voltage monitor as claimed in claim 14, wherein the first capacitive circuit further comprises a first capacitive divider circuit;

and

wherein the representation of the input voltage further comprises an attenuated representation of the input voltage established using a relationship between capacitances provided by at least two capacitors included in the first capacitive divider circuit.

17. The voltage monitor as claimed in claim 16, wherein the first capacitive divider circuit includes at least one variable capacitor;

and

wherein the attenuated representation of the input voltage is provided using an adjustable attenuation factor established using the at least one variable capacitor of the first capacitive divider circuit.

18. The voltage monitor as claimed in claim 14, wherein the first comparator circuit is configured to be de-powered when the second comparator of the second channel is selected to provide the output signal, except when the first channel is being refreshed.

19. The voltage monitor as claimed in claim 14, wherein the first comparator circuit is configured to remain powered at least during a refresh of the first channel, when the second comparator of the second channel is selected to provide the output signal.