Vialess memory structure and method of manufacturing same

• US 9,082,695 B2
• Filed: 06/06/2011
• Issued: 07/14/2015
• Est. Priority Date: 06/06/2011
• Status: Active Grant

• Current Assignee: Avalanche Technology Incorporated
• Original Assignee: Avalanche Technology Incorporated
• Inventors: Satoh, Kimihiro, Huai, Yiming, Zhang, Jing
• Primary Examiner(s): Payen, Marvin
• Assistant Examiner(s): JOY, JEREMY J
• Application Number:
  US13/154,346
• Publication Number:
  US 20120306033A1
• Time in Patent Office: 1,499 Days
• Field of Search: 438/3, 438/171, 438/210, 257/306, 257/E27.087, 257/E21.648, 257/E21.665
• US Class Current: 1/1
• CPC Class Codes: H10B 61/00 Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
• CPC Class Codes: H10B 61/10 comprising components having two electrodes, e.g. diodes or MIM elements
• CPC Class Codes: H10B 61/22 of the field-effect transistor [FET] type
• CPC Class Codes: H10N 50/01 Manufacture or treatment
• CPC Class Codes: H10N 50/10 Magnetoresistive devices

Abstract

A method of manufacturing a magnetic memory cell, including a magnetic tunnel junction (MTJ), includes using silicon nitride layer and silicon oxide layer to form a trench for depositing copper to be employed for connecting the MTJ to other circuitry without the use of a via.

Claims

1. A method of making a magnetic memory device comprising the steps of:

forming a plurality of MTJ stack pillars with exposed sidewalls in a substrate, each of said MTJ stack pillars comprising a bottom electrode and a top electrode with an MTJ memory element interposed therebetween, and a hard mask overlying said top electrode;

encapsulating said MTJ stack pillars by conformally depositing a first dielectric material over said substrate and said MTJ stack pillars including said exposed sidewalls thereof;

forming an insulating matrix surrounding said MTJ stack pillars covered with said first dielectric material by depositing a second dielectric material into gaps between said MTJ stack pillars and etching away portions of said second dielectric material above said MTJ stack pillars, said insulating matrix having an upper surface recessed from portions of said first dielectric material formed on top of said MTJ stack pillars;

forming conformal sidewall protection sleeves over said MTJ stack pillars and exposing upper surfaces of said hard masks by etching away said portions of said first dielectric material selectively to said insulating matrix;

removing said hard masks and exposing said top electrodes by etching said hard masks selectively to said insulating matrix and said conformal sidewall protection sleeves;

forming a dielectric interlayer on top of said MTJ stack pillars and said insulating matrix;

etching said dielectric interlayer to form a trench with at least two of said top electrodes and said upper surface of said insulating matrix exposed on bottom of said trench; and

forming a metal wire by filling said trench with a conductive material, said metal wire being directly coupled to at least two of said top electrodes of respective MTJ stack pillars.

2. The method of making a magnetic memory device according to claim 1, wherein said MTJ memory element comprises a magnetic fixed layer and a magnetic free layer with a barrier layer interposed therebetween.

3. The method of making a magnetic memory device according to claim 1, wherein said hard mask is made of silicon oxide, silicon nitride, aluminum oxide, or titanium nitride.

4. The method of making a magnetic memory device according to claim 1, wherein said trenches extend along a direction substantially parallel to a top surface of said substrate.

5. The method of making a magnetic memory device according to claim 1, wherein said metal wires are bit lines extending along a direction substantially parallel to a top surface of said substrate.

6. A method of making a magnetic memory cell comprising:

forming a MTJ pillar stack using photolithography and vertical dry etching wherein said MTJ pillar stack includes a bottom electrode, a MTJ memory element overlying said bottom electrode further including a pinned layer, a free layer and a barrier layer in between, and a top electrode overlying said MTJ memory element, after forming a MTJ pillar stack, depositing a first and a second dielectric materials, forming a second protection layer by recessing said second dielectric material down to a level below said first dielectric material sitting on a top of said MTJ pillar, forming a first protection layer exposing said top electrode with vertical dry etching, forming an inter dielectric layer, forming a trench in said inter dielectric layer reaching to said top electrode, forming a metal line directly connected to said top electrode in said trench with Damascene process.

7. The method of making a magnetic memory device according to claim 6, wherein said trench extends along a direction substantially orthogonal to a height direction of said MTJ pillar stack.

8. The method of making a magnetic memory device according to claim 6, wherein said metal line is a bit line extending along a direction substantially orthogonal to a height direction of said MTJ pillar stack.