System monitor for monitoring functional modules of a system

• US 9,092,552 B2
• Filed: 04/26/2013
• Issued: 07/28/2015
• Est. Priority Date: 04/26/2013
• Status: Active Grant

• Current Assignee: LivaNova USA, Inc. (LivaNova Plc)
• Original Assignee: Cyberonics, Inc
• Inventors: Nair, Sujith V., Gingerich, Jamin L., Desai, Tushar R., Tomayko, Brian C.
• Primary Examiner(s): CHU, GABRIEL L
• Application Number:
  US13/872,020
• Publication Number:
  US 20140325287A1
• Time in Patent Office: 823 Days
• Field of Search: None
• US Class Current: 1/1
• CPC Class Codes: A61B 2560/0271 using a remote monitoring unit
• CPC Class Codes: A61B 2560/0276 Determining malfunction
• CPC Class Codes: A61B 2560/028 Arrangements to prevent overuse, e.g. by counting the number of uses
• CPC Class Codes: A61B 5/0031 Implanted circuitry
• CPC Class Codes: A61B 5/1495 Calibrating or testing of in-vivo probes
• CPC Class Codes: A61N 1/372 Arrangements in connection with the implantation of stimulators
• CPC Class Codes: A61N 1/37211 Means for communicating with stimulators
• CPC Class Codes: A61N 1/37252 Details of algorithms or data aspects of communication system, e.g. handshaking, transmitting specific data or segmenting data
• CPC Class Codes: A61N 1/37254 Pacemaker or defibrillator security, e.g. to prevent or inhibit programming alterations by hackers or unauthorised individuals
• CPC Class Codes: G06F 11/0757 by exceeding a time limit, i.e. time-out, e.g. watchdogs
• CPC Class Codes: G06F 11/0793 Remedial or corrective actions recovery from an exception in an instruction pipeline G06F9/3861; by retry G06F11/1402; for recovering from a failure of a protocol instance or entity H04L69/40
• CPC Class Codes: G06F 11/0796 Safety measures, i.e. ensuring safe condition in the event of error, e.g. for controlling element
• CPC Class Codes: G06F 11/3013 where the computing system is an embedded system, i.e. a combination of hardware and software dedicated to perform a certain function in mobile devices, printers, automotive or aircraft systems testing or monitoring of control systems or parts thereof G05B23/02
• CPC Class Codes: G06F 11/34 Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
• CPC Class Codes: G16H 40/40 for the management of medical equipment or devices, e.g. scheduling maintenance or upgrades

Abstract

A method includes detecting a counter event at a system monitor of a system. The method also includes, in response to detecting the counter event, checking a state of each flag of a first set of flags. Each of the first set of flags is associated with a monitored module of the system, and the state of each of the first set of flags is indicated by a value at a memory location that is enabled. The method also includes, in response to determining that at least one flag of the first set of flags has a value indicating an error associated with a particular monitored module, causing an action to be performed at the system.

Claims

1. A method comprising:

during a first monitoring period, receiving enable signals from monitored modules of a system, wherein each monitored module provides at least one enable signal to enable at least one memory location associated with the monitored module;

establishing enabled memory locations in response to the enable signals;

during the first monitoring period, receiving one or more set signals from one or more of the monitored modules;

responsive to each set signal, setting a value at an enabled memory location that is associated with the monitored module that sent the set signal;

detecting a counter event indicating an end of the first monitoring period;

based on detecting the counter event, checking a value stored at each enabled memory location; and

in response to determining that at least one enabled memory location stores a value indicating an error associated with a particular monitored module, causing an action to be performed at the system.

2. The method of claim 1, wherein the enabled memory locations are dedicated registers.

3. The method of claim 1, wherein the action comprises disabling therapy provided by the system, and further comprising subsequently enabling the therapy based on an input received from an external device.

4. The method of claim 1, wherein the system includes or is included within an implantable medical device.

5. The method of claim 4, wherein the action comprises disabling therapy provided by the implantable medical device.

6. The method of claim 1, further comprising decrementing a count value of a counter from a starting value to an ending value, wherein the counter event is detected in response to the count value reaching the ending value.

7. The method of claim 6, further comprising:

resetting each enabled memory location to a particular value indicating a not-SET state after checking the value stored at each enabled memory location; and

resetting the counter to the starting value.

8. The method of claim 1, further comprising decrementing a count value from a starting value to an ending value, wherein the counter event is detected in response to the count value reaching a predetermined value that is between the starting value and the ending value.

9. The method of claim 1, wherein the action comprises sending a reset signal to the particular module, setting an interrupt on at least one module, or both.

10. The method of claim 1, further comprising:

decrementing a first counter from a first starting value to a first ending value, wherein the counter event is detected in response to the first counter reaching a first particular value, and further comprising;

decrementing a second counter from a second starting value to a second ending value;

detecting a second counter event in response to the second counter reaching a second particular value; and

in response to detecting the second counter event, checking values stored at second enabled memory locations, wherein the enabled memory locations are distinct from the second enabled memory locations.

11. The method of claim 10, wherein the second counter is initiated in response to detecting the counter event.

12. The method of claim 10, wherein the first starting value is different from the second starting value.

13. The method of claim 10, wherein the first counter and the second counter operate concurrently.

14. A non-transitory computer-readable storage medium storing instructions executable by a processor to cause the processor to perform operations comprising:

during a first monitoring period, receiving enable signals from monitored modules of a system, wherein each monitored module provides at least one enable signal to enable at least one memory location associated with the monitored module;

establishing enabled memory locations in response to the enable signals;

during the first monitoring period, receiving one or more set signals from one or more of the monitored modules;

responsive to each set signal, setting a value at an enabled memory location that is associated with the monitored module that sent the set signal;

detecting a counter event indicating an end of the first monitoring period;

based on detecting the counter event, checking a value stored at each enabled memory location; and

in response to determining that at least one enabled memory location stores a value indicating an error associated with a particular monitored module, causing an action to be performed at the system.

15. The non-transitory computer-readable medium of claim 14, wherein the operations further comprise reversing the action in response to receipt of a particular signal from a device external to the system.

16. The non-transitory computer-readable medium of claim 14, wherein the system includes or is included within an implantable medical device, and wherein the action comprises disabling therapy provided to a patient via the implantable medical device.

17. A system comprising:

circuitry configured to receive enable signals from monitored modules during a first monitoring period and configured to establish enabled memory locations in response to the enable signals, wherein each monitored module provides at least one enable signal to enable at least one memory location associated with the monitored module;

circuitry configured to receive one or more set signals from one or more of the monitored modules during the first monitoring period and configured to, responsive to each set signal, set a value at an enabled memory location that is associated with the monitored module that sent the set signal;

circuitry configured to detect a counter event indicating an end of the first monitoring period;

circuitry configured to, based on detection of the counter event, check a value stored at each enabled memory location; and

circuitry configured to, in response to a determination that at least one enabled memory location stores a value indicating an error associated with a particular monitored module, cause an action to be performed.

18. The system of claim 17, wherein at least one enabled memory location is a dedicated register.

19. The system of claim 17, wherein the system includes or is included within an implantable medical device and the action comprises disabling therapy provided to a patient via the implantable medical device.

20. The system of claim 19, wherein the therapy is provided by a module that is distinct from the particular monitored module associated with the error.