Low power multi-core decoder system and method

• US 9,092,686 B2
• Filed: 07/01/2013
• Issued: 07/28/2015
• Est. Priority Date: 10/01/2009
• Status: Active Grant

• Current Assignee: Hand Held Products Incorporated (Honeywell International Inc.)
• Original Assignee: Hand Held Products Incorporated (Honeywell International Inc.)
• Inventors: Wang, Ynjiun P.
• Primary Examiner(s): Richer, Joni
• Application Number:
  US13/932,634
• Publication Number:
  US 20140008439A1
• Time in Patent Office: 757 Days
• Field of Search: 345/501, 345/502, 345/505, 345/530, 345/554, 345/557, 235/462.01, 235/462.09, 235/462.1, 235/462.11, 718/105
• US Class Current: 1/1
• CPC Class Codes: G06K 19/06028 using bar codes
• CPC Class Codes: G06K 19/06037 multi-dimensional coding
• CPC Class Codes: G06K 7/10722 Photodetector array or CCD scanning
• CPC Class Codes: G06K 7/10881 constructional details of hand-held scanners
• CPC Class Codes: G06K 7/1093 sensing, after transfer of the image of the data-field to an intermediate store, e.g. storage with cathode ray tube
• CPC Class Codes: G06K 7/1404 Methods for optical code recognition
• CPC Class Codes: G06K 7/1408 the method being specifically adapted for the type of code
• CPC Class Codes: G06K 7/1413 1D bar codes
• CPC Class Codes: G06K 7/1417 2D bar codes
• CPC Class Codes: G06K 7/1447 extracting optical codes from image or text carrying said optical code

Abstract

A portable data terminal including a multi-core processor having at least a first core and a second core, at least one illumination assembly and at least one imaging assembly and data storage means configured to store a plurality of program instructions, the program instructions including at least one one-dimensional decoder and at least one two-dimensional decoder.

Claims

1. A portable data terminal, comprising:

a multi-core processor having at least a first core and a second core, the multi-core processor receiving image data on a first clock cycle;

at least one illumination assembly and at least one imaging assembly; and

data storage means configured to store a plurality of program instructions, the program instructions including at least one one-dimensional decoder and at least one two-dimensional decoder, the decoders running in parallel on the first clock cycle, and

wherein the program instructions stored in the data storage means further includes an image quality filter.

2. The portable data terminal of claim 1 wherein the data storage means further includes including at least one multi-port memory module having at least a first port and a second port, the at least one multi-port memory module being configured to receive output signals from the imaging assembly and communicate with the multi-core processor.

3. The portable data terminal of claim 1 further including a power supply, at least one system bus, a network interface, a display interface, and a user input interface.

4. The portable data terminal of claim 1 further including at least one management module selected from the group consisting of a clock management module configured to dynamically vary the clock speed received by each respective core based on the workload of each core and a power management module configured to dynamically vary the voltage received by at least a portion of each core.

5. The portable data terminal of claim 1 wherein the first core of the multi-core processor executes the one-dimensional decoder and the second core executes the two-dimensional decoder.

6. The portable data terminal of claim 1 wherein the first core of the multi-core processor executes the image quality filter and the second core of the multi-core processor communicates with the network interface.

7. The portable data terminal of claim 1, wherein the image quality filter is configured with filter program instructions that analyze pixel data retrieved by the multi-core processor and assign an image quality score to the pixel data.

8. The portable data terminal of claim 1, wherein the multi-core processor comprises a frame buffer receiving the image data from the imaging assembly and the image quality filter assigns a score to each frame of data in the buffer.

9. The portable data terminal of claim 1, wherein the image quality filter is processed in the first core.

10. The portable data terminal of claim 9, wherein the second core processes the decoders.

11. A portable data terminal, comprising:

a multi-core processor having at least a first core and a second core;

at least one illumination assembly and at least one imaging assembly;

a dual port memory receiving output signals from the imaging assembly on a first clock cycle and the multi-core processor retrieving image data from the dual port memory on the first clock cycle;

data storage means configured to store a plurality of program instructions, the program instructions including at least one one-dimensional decoder and at least one two-dimensional decoder; and

wherein the first core of the multi-core processor executes the one-dimensional decoder and the second core executes the two-dimensional decoder, and

wherein the one-dimensional decoder and two-dimensional decoder run in parallel and on the first clock cycle.

12. The portable data terminal of claim 11, comprising a first level of cache and a second level of cache, the first level including an instruction cache and a data cache for each core and the second level being shared among all the cores.

13. The portable data terminal of claim 11, wherein the multi-core processor comprises a third core and a fourth core, wherein the program instructions stored in the data storage means comprises an image quality filter and wherein the third core of the multi-core processor executes the image quality filter and the fourth core of the multi-core processor communicates with the network interface.

14. The portable data terminal of claim 11, comprising a direct memory access controller in communication with the imaging assembly, multi-core processor and data storage means and wherein the data storage means comprises at least one single port memory module.

15. A portable data terminal, comprising:

a multi-core processor having at least a first core and a second core;

at least one illumination assembly and at least one imaging assembly;

a dual port memory receiving output signals from the imaging assembly on a first clock cycle and the multi-core processor retrieving image data from the dual port memory on the first clock cycle;

data storage means configured to store a plurality of program instructions, the program instructions including at least one one-dimensional decoder and at least one two-dimensional decoder; and

wherein the one-dimensional decoder and two-dimensional decoder run in parallel and on the first clock cycle.

16. The portable data terminal of claim 15, comprising a power supply, at least one system bus, a network interface, a display interface, a system bus, and a user input interface.

17. The portable data terminal of claim 15, wherein the imaging assembly comprises imaging optics and an image sensor and the illumination assembly comprises illumination optics and at least one light source.

18. The portable data terminal of claim 15, comprising at least one management module selected from the group consisting of a clock management module configured to dynamically vary the clock speed received by each respective core based on the workload of each core and a power management module configured to dynamically vary the voltage received by at least a portion of each core.

19. The portable data terminal of claim 15, wherein a first port of the memory is configured to receive at least one output signal from the imaging assembly, the output signals representing pixel data transmitted by the image sensor, and a second port of the memory is configured to communicate with the multi-core processor.

20. The portable data terminal of claim 15, wherein the multi-core processor comprises a third core and a fourth core, wherein the program instructions stored in the data storage means comprises an image quality filter and wherein the third core of the multi-core processor executes the image quality filter and the fourth core of the multi-core processor communicates with the network interface.