Method for manufacturing a mask having submillimetric apertures for a submillimetric electrically conductive grid, mask having submillimetric apertures and submillimetric electrically conductive grid

• US 9,114,425 B2
• Filed: 09/24/2009
• Issued: 08/25/2015
• Est. Priority Date: 09/24/2008
• Status: Expired due to Fees

• Current Assignee: Saint-Gobain Glass France (Compagnie De Saint-Gobain)
• Original Assignee: Saint-Gobain Glass France (Compagnie De Saint-Gobain)
• Inventors: Zagdoun, Georges, Nghiem, Bernard, Valentin, Emmanuel, Tchakarov, Svetoslav
• Primary Examiner(s): Meeks, Timothy
• Assistant Examiner(s): Rodriguez, Michael P
• Application Number:
  US13/120,265
• Publication Number:
  US 20110240343A1
• Time in Patent Office: 2,161 Days
• Field of Search: None
• US Class Current: 1/1
• CPC Class Codes: B05D 1/322 Removable films used as masks
• CPC Class Codes: B05D 1/38 with intermediate treatment intermediate treatment per se B05D3/00
• CPC Class Codes: B05D 3/12 by mechanical means
• CPC Class Codes: B05D 5/00 Processes for applying liquids or other fluent materials to surfaces to obtain special surface effects, finishes or structures
• CPC Class Codes: C03C 17/002 for flat glass, e.g. float glass
• CPC Class Codes: C03C 17/06 with metals C03C17/34, C03C17/44 take precedence
• CPC Class Codes: C03C 17/23 Oxides C03C17/02 takes precedence
• CPC Class Codes: C03C 2218/328 Partly or completely removing a coating
• CPC Class Codes: C03C 2218/34 Masking
• CPC Class Codes: H05K 3/048 using a lift-off resist pattern or a release layer pattern
• CPC Class Codes: H10K 50/805 Electrodes
• CPC Class Codes: H10K 50/81 Anodes
• CPC Class Codes: H10K 50/813 characterised by their shape
• CPC Class Codes: Y10T 29/49002 Electrical device making
• CPC Class Codes: Y10T 428/24273 including aperture

Abstract

A process for manufacturing a mask having submillimetric openings, in which: for a masking layer, a solution of colloidal nanoparticles that are stabilized and dispersed in a first solvent is deposited, the particles having a given glass transition temperature T_g, the drying of the masking layer is carried out at a temperature below the temperature T_g until a mask having a two-dimensional network of submillimetric openings is obtained with substantially straight mask area edges, in a zone referred to as a network mask zone, a zone free of masking is formed on the face by mechanical and/or optical removal of at least one peripheral portion of the network mask zone. The invention also relates to the network mask and the grid with an electroconductive solid zone that are thus obtained.

Claims

1. A process for manufacturing a submillimetric electroconductive grid on a main face of a substrate, comprising:

(a) depositing an electroconductive material,

(i) on the main face, through submillimetric openings of a network mask until a fraction of a depth of the submillimetric openings is filled, the network mask obtained by

depositing a liquid masking layer as a solution and drying the liquid masking layer, wherein;

for said liquid masking layer, a solution of colloidal nanoparticles stabilized and dispersed in a solvent is deposited, the nanoparticles having a glass transition temperature T_g;

said drying of the masking layer is carried out at a temperature below said temperature T_g until the network mask having a two-dimensional network of the submillimetric openings is obtained with substantially straight mask area edges, the network mask being on a network mask zone, and

prior to depositing the electroconductive material, forming a zone free of masking on said main face by mechanical and/or optical removal of at least one peripheral portion of the network mask zone,

(ii) and on the zone free of masking so that the electroconductive material connects the zone free of masking to the submillimetric openings; and

(b) removing the network mask revealing the submillimetric electroconductive grid.

2. The process for manufacturing a grid as claimed in claim 1, wherein the network mask is removed by a liquid route.

3. The process for manufacturing a grid as claimed in claim 2, wherein the network mask is removed by an aqueous solvent.

4. The process for manufacturing a grid as claimed in claim 1, wherein the solution of colloidal nanoparticles is deposited on a hydrophilic surface.

5. The process for manufacturing a grid as claimed in claim 1, wherein the nanoparticles are polymeric and/or the nanoparticles are inorganic.

6. The process for manufacturing a grid as claimed in claim 5, wherein the polymeric nanoparticles are made with acrylic copolymers, polystyrenes, poly(meth)acrylates, polyesters or blends thereof.

7. The process for manufacturing a grid as claimed in claim 5, wherein the inorganic nanoparticles are made with silica, alumina or iron oxide.

8. The process for manufacturing a grid as claimed in claim 1, wherein the masking layer is dried at a temperature below 50°

C.

9. The process for manufacturing a grid as claimed in claim 8, wherein the temperature is ambient temperature.

10. The process for manufacturing a grid as claimed in claim 1, wherein the shape and the size of the colloidal nanoparticles are not substantially modified by the drying.

11. The process for manufacturing a grid as claimed in claim 1, wherein a thickness of the network mask is between 1 and 100 microns.

12. The process for manufacturing a grid as claimed in claim 11, wherein the thickness of the network mask is between 2 and 50 microns.

13. The process for manufacturing a grid as claimed in claim 1, wherein the network mask has a ratio of a distance between the openings (B) to a submillimetric width of the openings (A) between 7 and 40 and/or a width (A) between 200 nm and 50 μ

m and a distance (B) between the openings between 5 and 500 μ

m.

14. The process for manufacturing a grid as claimed in claim 1, wherein the grid has an aperiodic or random structure in at least one direction.

15. The process for manufacturing a grid as claimed in claim 14, wherein the grid has an aperiodic or random structure in two directions.

16. The process for manufacturing a grid as claimed in claim 1, wherein the electroconductive grid has a sheet resistance between 0.1 and 30 ohm/square.

17. The process for manufacturing a grid as claimed in claim 1, wherein a light transmission of the substrate coated with the grid is greater than 70% and/or the light transmission, in a given IR band, of the substrate coated with the grid is greater than 70% and/or the light transmission, in a given UV band, of the substrate coated with the grid is greater than 70%.

18. The process for manufacturing a grid as claimed in claim 1, wherein a light transmission of the substrate coated with the grid is between 70% and 86% and/or the light transmission, in a given IR band, of the substrate coated with the grid is between 70% and 86% and/or the light transmission, in a given UV band, of the substrate coated with the grid is between 70% and 86%.

19. The process for manufacturing a grid as claimed in claim 1, wherein prior to depositing the electroconductive material, the process comprises masking part of the main face of the substrate to define an electrically insulating zone in which the deposition of the electroconductive material is prevented in said part of the main face of the substrate.

20. The process for manufacturing a grid as claimed in claim 1, wherein the electroconductive material is deposited simultaneously through the submillimetric openings and on the zone free of masking.