Maintaining optimum voltage supply to match performance of an integrated circuit

• US 9,134,782 B2
• Filed: 05/07/2007
• Issued: 09/15/2015
• Est. Priority Date: 05/07/2007
• Status: Active Grant

• Current Assignee: NVIDIA Corporation
• Original Assignee: NVIDIA Corporation
• Inventors: Reddy, Sreenivas Aerra, Arulanandam, Srinivasan, Rajaraman, Venkataraman
• Primary Examiner(s): Abbaszadeh, Jaweed A
• Assistant Examiner(s): JOHNSON, TERRELL S
• Application Number:
  US11/744,916
• Publication Number:
  US 20080282102A1
• Time in Patent Office: 3,053 Days
• Field of Search: 713/300, 713/500, 713/502, 713/503
• US Class Current: 1/1
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/3296 by lowering the supply or operating voltage
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Power supply voltage to an integrated circuit (IC) or a portion of an IC is maintained at an optimum level matching the IC performance. Voltage ranges and delay measures for corresponding operating frequencies are stored in tables in a voltage control block. When a new frequency of operation is desired, the voltage control block measures delay performance of the IC, and sets the supply voltage to a value specified in a corresponding entry in a table. The voltage control block then continues to measure delay performance, and dynamically adjusts the power supply voltage to an optimum value thereby minimizing power consumption.

Claims

1. A method of providing voltage to an integrated circuit (IC), said method comprising:

accessing a look-up table comprising values of a plurality of operating frequencies of said IC, a plurality of acceptable supply voltage ranges, and a plurality of predetermined delay measures, wherein each operating frequency is associated with a respective supply voltage of said plurality of supply voltages, and further with a respective acceptable voltage range and with a respective predetermined delay measures;

setting a supply voltage value to a selected value based on a selected operating frequency of said IC and based on said look-up table, wherein said supply voltage value is within an acceptable voltage range associated with said selected operating frequency;

measuring a delay performance of said IC associated with said selected value;

comparing said delay performance to a predetermined delay measure associated with said selected operating frequency;

lowering said supply voltage value to a voltage value below said selected value if said delay performance is greater than said predetermined delay measure;

increasing said supply voltage value to a voltage value higher than said selected value if said delay performance is less than said predetermined delay measure; and

performing said measuring more than once and in response thereto performing said lowering and said increasing respectively if said selected operating frequency remains unchanged.

2. The method of claim 1, wherein said performing comprises performing said measuring periodically.

3. The method of claim 2, wherein said look-up table is selected from a plurality of look-up tables, wherein each of said plurality of look-up table is associated with a corresponding process corner, and wherein said look-up table is selected prior to said setting.

4. The method of claim 1, wherein said increasing and said lowering are performed in accordance with hysteresis to reduce oscillations in a closed-loop feedback system.

5. The method as described by claim 1, wherein said predetermined delay measure associated with said selected operating frequency is determined during fabrication of said IC.

6. The method as described by claim 1, wherein said lowering and said increasing is based on a granularity level of a power measurement unit.

7. The method of claim 3, wherein said plurality of tables is stored in a register bank comprised in said IC.

8. The method of claim 3, wherein said plurality of tables is stored in a memory comprised in said IC.

9. The method of claim 3, wherein said plurality of tables is hardcoded during fabrication of said IC.

10. The method of claim 3, wherein said plurality of tables is downloaded from an external storage with respect to said IC.

11. The method of claim 1, wherein said lowering said supply voltage value comprises:

selecting a voltage value below said selected value according to an exponential relationship between said selected value and said voltage value below said selected value; and

setting said supply voltage value to said voltage value below said selected value.

12. The method of claim 1 wherein said predetermined delay measure is determined during testing after fabrication of said integrated circuit.

13. A system comprising:

a processing unit operable to execute instructions;

a power management unit (PMU) coupled to said processing unit;

a voltage control block coupled to said processing unit and said PMU, wherein said voltage control block comprises;

a look-up table storing values of a plurality of operating frequencies of said processing unit, a plurality of acceptable voltage ranges, and a plurality of predetermined delay measures of said processing unit, wherein each operating frequency is associated with a respective acceptable voltage range and with a respective predetermined delay measure in said look-up;

a ring oscillator operable to measure a delay performance of said processing unit;

a controller operable to setting a supply voltage value to based on a selected operating frequency of said processing unit based on said look-up table, wherein said supply voltage value is within an acceptable voltage range associated with said selected operable frequency;

wherein said voltage control block is further configured to;

compare said delay performance to a predetermined delay measure associated with said selected operating frequency, wherein said predetermined delay measure is determined after fabrication of said processing unit; and

communicate said supply voltage value to said PMU, wherein said PMU is configured to control a voltage provided by a power source to said processing unit based on said supply voltage value and a predetermined delay measure associated with said selected operating frequency, wherein said voltage control block is separate from said processing unit.

14. The system of claim 13, wherein said voltage control block is operable to control and adjust said voltage provided by said power source to said processing unit multiple times during a time period over which said selected operating frequency remains unchanged.

15. The system of claim 13 further comprising:

an input interface operable to receive said selected operating frequency associated with said processing unit; and

an output interface operable to communicate said operating voltage to said PMU.

16. The system of claim 15, wherein said controller comprises a hysteresis counter operable to reduce oscillations during voltage adjustment provided by said power source to said processing unit.

17. The system of claim 13, wherein said processing unit and said voltage control block are within an integrated circuit.

18. The system as described by claim 13, wherein said voltage control block is operable to cause said PMU to lower said voltage provided by said power source if a delay performance of said processing unit associated with said voltage provided by said power source is greater than a delay measure associated with said operating voltage.

19. The system as described by claim 13, wherein said voltage control block is operable to cause said PMU to increase said voltage provided by said power source if a delay performance of said processing unit associated with said voltage provided by said power source is less than a delay measure associated with said operating voltage.

20. The system as described by claim 13, wherein said voltage control block is operable to control said voltage provided by said power source independent of said processing unit.

21. The system of claim 15, wherein said look-up table is stored in a register bank comprised in said voltage control block.

22. The system of claim 15, wherein said look-up table is stored in a memory comprised in said voltage control block.

23. The system of claim 15, wherein said look-up table is hardcoded during fabrication of said system.

24. The system of claim 15, wherein said look-up table is downloaded from an external storage with respect to said system.

25. An apparatus for providing voltage supply to an integrated circuit (IC), said apparatus comprising:

means for accessing a look-up table comprising a plurality of operating frequencies, a plurality of acceptable voltage ranges, and a plurality of predetermined delay measures, wherein each operating frequency is associated with a respective acceptable voltage range and with a respective predetermined delay measure;

means for setting a supply voltage value to a selected value based on a selected operating frequency of said IC based on said look-up table, wherein said supply voltage is within an acceptable voltage range associated with said selected operation frequency;

means for measuring a delay performance of said IC associated with said selected value;

means for comparing said delay performance to a predetermined delay measure associated with said selected operating frequency, wherein said predetermined delay measure is determined after fabrication of said integrated circuit;

means for lowering said supply voltage value to a voltage value below said selected value if said delay performance is greater than said predetermined delay measure; and

means for increasing said supply voltage value to a voltage value higher than said selected value if said delay performance is less than said delay predetermined measure, wherein said means for measuring is operable to measure said delay performance more than once and in response thereto said means for increasing said supply voltage and said means for lowering said supply voltage are operable to adjust said supply voltage if said selected operating frequency remains unchanged.

26. The apparatus of claim 25 further comprising:

means for receiving a clock frequency associated with said selected operating frequency;

means for identifying said acceptable voltage range associated with said selected operating frequency, wherein said increasing and said lowering of said supply voltage value is within said acceptable voltage range.

27. The apparatus of claim 25, wherein said look-up table is selected from a plurality of tables, wherein each table is associated with a corresponding process corner, and wherein table selection occurs prior to said setting.

28. The apparatus as described by claim 25, wherein said means for lowering and said means for increasing are based on granularity level of a power measurement unit.

29. The apparatus of claim 27, wherein said plurality of tables is stored in a register bank comprised in said IC.

30. The apparatus of claim 27, wherein said plurality of tables is stored in a memory comprised in said IC.

31. The apparatus of claim 27, wherein said plurality of tables is hardcoded during fabrication of said IC.

32. The apparatus of claim 27, wherein said plurality of tables is downloaded from an external storage with respect to said IC.

33. The apparatus of claim 25, wherein said means for lowering said supply voltage value comprises:

means for selecting a voltage value below said selected value according to an exponential relationship between said selected value and said voltage value below said selected value; and

means for setting said supply voltage value to said voltage value below said selected value.