RF switch implementation in CMOS process

• US 9,136,838 B2
• Filed: 09/21/2010
• Issued: 09/15/2015
• Est. Priority Date: 09/21/2010
• Status: Active Grant

• Current Assignee: DSP Group Ltd. (Synaptics Incorporated)
• Original Assignee: DSP Group Ltd. (Synaptics Incorporated)
• Inventors: Hasson, Yaron, Mostov, Alex
• Primary Examiner(s): Urban, Edward
• Assistant Examiner(s): HU, RUI MENG
• Application Number:
  US13/823,367
• Publication Number:
  US 20130244595A1
• Time in Patent Office: 1,820 Days
• Field of Search: 455 78- 83, 455/562.1, 455/575.7
• US Class Current: 1/1
• CPC Class Codes: H03K 17/6872 using complementary field-effect transistors
• CPC Class Codes: H03K 17/693 Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors logic circuits H03K19/00; code converters H03M5/00, H03M7/00
• CPC Class Codes: H04B 1/44 Transmit/receive switching
• CPC Class Codes: H04B 1/525 with means for reducing leakage of transmitter signal into the receiver

Abstract

A dual pole dual through switch for switching between at least four states. The switch comprises four transistors such as N-channel Metal Oxide Semiconductor transistors, such that at each state at most one transistor is in “on” state, and the others are in “off” state. Each transistor has its own control circuit, which provides zero or negative voltage to the drain of the transistor, positive voltage to the source of the transistor, and control alternating voltage to the gate of the transistor. The switch can be used on-chip for devices. Such devices may include a base station or a handset of a cordless phone.

Claims

1. A radio frequency (RF) switch that is coupled to a receiver, to a transmitter, to a first antenna and to a second antenna;

wherein the RF switch comprises;

a first transistor, a second transistor, a third transistor a fourth transistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, and an eight capacitor;

wherein only the first capacitor, the first transistor and the second capacitor are connected between the transmitter and the first antenna;

wherein only the third capacitor, the second transistor and the fourth capacitor are connected between the receiver and the first antenna;

wherein only the fifth capacitor, the third transistor and the sixth capacitor are connected between the transmitter and the second antenna;

wherein only the seventh capacitor, the fourth transistor and the eighth capacitor are connected between the receiver and the second antenna;

first, second, third and fourth control circuits configured to control the first, second, third and fourth transistors respectively and to place only one of said four transistors in an on state while placing the remaining three transistors in a reverse biased off state;

a first low pass filter and termination circuit that is coupled between the first transistor and the first control circuit;

a second low pass filter and termination circuit that is coupled between the second transistor and the second control circuit; and

a third low pass filter and termination circuit that is coupled between the third transistor and the third control circuit and a fourth low pass filter and termination circuit that is coupled between the fourth transistor and the fourth control circuit;

wherein each one of the first, second, third and fourth low pass filter and termination circuits comprises a pair of serially coupled first and second resistors and a pair of capacitors that are coupled in parallel to each other and are coupled to a junction between the first and second resistors.

2. A radio frequency (RF) switch that is coupled to a receiver, to a transmitter, to a first antenna and to a second antenna;

wherein the RF switch comprises;

a first transistor, a second transistor, a third transistor a fourth transistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, and an eight capacitor;

wherein only the first capacitor, the first transistor and the second capacitor are connected between the transmitter and the first antenna;

wherein only the third capacitor, the second transistor and the fourth capacitor are connected between the receiver and the first antenna;

wherein only the fifth capacitor, the third transistor and the sixth capacitor are connected between the transmitter and the second antenna;

wherein only the seventh capacitor, the fourth transistor and the eighth capacitor are connected between the receiver and the second antenna;

first, second, third and fourth control circuits configured to control the first, second, third and fourth transistors respectively and to place only one of said four transistors in an on state while placing the remaining three transistors in a reverse biased off state;

a first low pass filter and termination circuit that is coupled between the first transistor and the first control circuit;

a second low pass filter and termination circuit that is coupled between the second transistor and the second control circuit; and

a third low pass filter and termination circuit that is coupled between the third transistor and the third control circuit and a fourth low pass filter and termination circuit that is coupled between the fourth transistor and the fourth control circuit;

wherein the first low pass filter and termination circuit is arranged to provide a zero or a negative voltage to the drain of the first transistor, to provide a positive voltage to the source of first transistor and to provide an alternating voltage to the gate of the first transistor;

wherein the second low pass filter and termination circuit is arranged to provide a zero or a negative voltage to the drain of the second transistor, to provide a positive voltage to the source of second transistor and to provide an alternating voltage to the gate of the second transistor;

wherein the third low pass filter and termination circuit is arranged to provide a zero or a negative voltage to the drain of the third transistor, to provide a positive voltage to the source of third transistor and to provide an alternating voltage to the gate of the third transistor; and

wherein the fourth low pass filter and termination circuit is arranged to provide a zero or a negative voltage to the drain of the fourth transistor, to provide a positive voltage to the source of fourth transistor and to provide an alternating voltage to the gate of the fourth transistor.

3. A radio frequency (RF) switch that is coupled to a receiver, to a transmitter, to a first antenna and to a second antenna;

wherein the RF switch comprises;

a first transistor, a second transistor, a third transistor a fourth transistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, and an eight capacitor;

wherein only the first capacitor, the first transistor and the second capacitor are connected between the transmitter and the first antenna;

wherein only the third capacitor, the second transistor and the fourth capacitor are connected between the receiver and the first antenna;

wherein only the fifth capacitor, the third transistor and the sixth capacitor are connected between the transmitter and the second antenna;

wherein only the seventh capacitor, the fourth transistor and the eighth capacitor are connected between the receiver and the second antenna;

first, second, third and fourth control circuits configured to control the first, second, third and fourth transistors respectively and to place only one of said four transistors in an on state while placing the remaining three transistors in a reverse biased off state;

a first low pass filter and termination circuit that is coupled between the first transistor and the first control circuit;

a second low pass filter and termination circuit that is coupled between the second transistor and the second control circuit; and

a third low pass filter and termination circuit that is coupled between the third transistor and the third control circuit and a fourth low pass filter and termination circuit that is coupled between the fourth transistor and the fourth control circuit;

wherein the first low pass filter and termination circuit has a first set of components that is coupled to the drain of the first transistor, a second set of components that is coupled to the source of the first transistor and a third set of components that is coupled to the gate of the first transistor;

wherein the second low pass filter and termination circuit has a first set of components that is coupled to the drain of the second transistor, a second set of components that is coupled to the source of the second transistor and a third set of components that is coupled to the gate of the second transistor;

wherein the third low pass filter and termination circuit has a first set of components that is coupled to the drain of the third transistor, a second set of components that is coupled to the source of the third transistor and a third set of components that is coupled to the gate of the third transistor;

wherein the fourth low pass filter and termination circuit has a first set of components that is coupled to the drain of the fourth transistor, a second set of components that is coupled to the source of the fourth transistor and a third set of components that is coupled to the gate of the fourth transistor.

4. A wireless communication device having a handset and a base station, the base station comprising:

a first antenna and a second antenna, a transmitter and a receiver, each of the first antenna and the second antenna operative to transmit and receive data; and

a radio frequency (RF) switch located on a chip of the base station;

wherein the RF switch comprises;

a first transistor, a second transistor, a third transistor a fourth transistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, and an eight capacitor;

wherein only the first capacitor, the first transistor and the second capacitor are connected between the transmitter and the first antenna;

wherein only the third capacitor, the second transistor and the fourth capacitor are connected between the receiver and the first antenna;

wherein only the fifth capacitor, the first third transistor and the sixth capacitor are connected between the transmitter and the second antenna;

wherein only the seventh capacitor, the fourth transistor and the eighth capacitor are connected between the receiver and the second antenna;

a first low pass filter and termination circuit that is coupled between the first transistor and the first control circuit;

a second low pass filter and termination circuit that is coupled between the second transistor and the second control circuit;

a third low pass filter and termination circuit that is coupled between the third transistor and the third control circuit and a fourth low pass filter and termination circuit that is coupled between the fourth transistor and the fourth control circuit;

wherein each one of the first, second, third and fourth low pass filter and termination circuits comprises a pair of serially coupled first and second resistors and a pair of capacitors that are coupled in parallel to each other and are coupled to a junction between the first and second resistors.

5. A wireless communication device having a handset and a base station, the base station comprising:

a first antenna and a second antenna, a transmitter and a receiver, each of the first antenna and the second antenna operative to transmit and receive data; and

a radio frequency (RF) switch located on a chip of the base station;

wherein the RF switch comprises;

a first transistor, a second transistor, a third transistor a fourth transistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, and an eight capacitor;

wherein only the first capacitor, the first transistor and the second capacitor are connected between the transmitter and the first antenna;

wherein only the third capacitor, the second transistor and the fourth capacitor are connected between the receiver and the first antenna;

wherein only the fifth capacitor, the first third transistor and the sixth capacitor are connected between the transmitter and the second antenna;

wherein only the seventh capacitor, the fourth transistor and the eighth capacitor are connected between the receiver and the second antenna;

a first low pass filter and termination circuit that is coupled between the first transistor and the first control circuit;

a second low pass filter and termination circuit that is coupled between the second transistor and the second control circuit;

a third low pass filter and termination circuit that is coupled between the third transistor and the third control circuit and a fourth low pass filter and termination circuit that is coupled between the fourth transistor and the fourth control circuit;

wherein the first low pass filter and termination circuit is arranged to provide a zero or a negative voltage to the drain of the first transistor, to provide a positive voltage to the source of first transistor and to provide an alternating voltage to the gate of the first transistor;

wherein the second low pass filter and termination circuit is arranged to provide a zero or a negative voltage to the drain of the second transistor, to provide a positive voltage to the source of second transistor and to provide an alternating voltage to the gate of the second transistor;

wherein the third low pass filter and termination circuit is arranged to provide a zero or a negative voltage to the drain of the third transistor, to provide a positive voltage to the source of third transistor and to provide an alternating voltage to the gate of the third transistor; and

wherein the fourth low pass filter and termination circuit is arranged to provide a zero or a negative voltage to the drain of the fourth transistor, to provide a positive voltage to the source of fourth transistor and to provide an alternating voltage to the gate of the fourth transistor.

6. A wireless communication device having a handset and a base station, the base station comprising:

a first antenna and a second antenna, a transmitter and a receiver, each of the first antenna and the second antenna operative to transmit and receive data; and

a radio frequency (RF) switch located on a chip of the base station;

wherein the RF switch comprises;

a first transistor, a second transistor, a third transistor a fourth transistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, and an eight capacitor;

wherein only the first capacitor, the first transistor and the second capacitor are connected between the transmitter and the first antenna;

wherein only the third capacitor, the second transistor and the fourth capacitor are connected between the receiver and the first antenna;

wherein only the fifth capacitor, the first third transistor and the sixth capacitor are connected between the transmitter and the second antenna;

wherein only the seventh capacitor, the fourth transistor and the eighth capacitor are connected between the receiver and the second antenna;

a first low pass filter and termination circuit that is coupled between the first transistor and the first control circuit;

a second low pass filter and termination circuit that is coupled between the second transistor and the second control circuit;

a third low pass filter and termination circuit that is coupled between the third transistor and the third control circuit and a fourth low pass filter and termination circuit that is coupled between the fourth transistor and the fourth control circuit;

wherein the first low pass filter and termination circuit has a first set of components that is coupled to the drain of the first transistor, a second set of components that is coupled to the source of the first transistor and a third set of components that is coupled to the gate of the first transistor;

wherein the second low pass filter and termination circuit has a first set of components that is coupled to the drain of the second transistor, a second set of components that is coupled to the source of the second transistor and a third set of components that is coupled to the gate of the second transistor;

wherein the third low pass filter and termination circuit has a first set of components that is coupled to the drain of the third transistor, a second set of components that is coupled to the source of the third transistor and a third set of components that is coupled to the gate of the third transistor;

wherein the fourth low pass filter and termination circuit has a first set of components that is coupled to the drain of the fourth transistor, a second set of components that is coupled to the source of the fourth transistor and a third set of components that is coupled to the gate of the fourth transistor.