Camera with linked parallel processor cores

• US 9,143,635 B2
• Filed: 09/15/2012
• Issued: 09/22/2015
• Est. Priority Date: 07/15/1997
• Status: Expired due to Fees

• Current Assignee: Google LLC (Alphabet Inc.)
• Original Assignee: Google Inc. (Alphabet Inc.)
• Inventors: Silverbrook, Kia
• Primary Examiner(s): GILES, NICHOLAS G
• Application Number:
  US13/620,928
• Publication Number:
  US 20130016230A1
• Time in Patent Office: 1,102 Days
• US Class Current: 1/1
• CPC Class Codes: B41J 11/0005 Curl smoothing, i.e. smoothing down corrugated printing material, e.g. by pressing means acting on wrinkled printing material
• CPC Class Codes: B41J 11/005 Guides in the printing zone, e.g. guides for preventing contact of conveyed sheets with printhead
• CPC Class Codes: B41J 11/70 cutting perpendicular to the direction of paper feed
• CPC Class Codes: B41J 15/04 Supporting, feeding, or guiding devices; Mountings for web rolls or spindles
• CPC Class Codes: B41J 2/14314 Structure of ink jet print heads with electrostatically actuated membrane
• CPC Class Codes: B41J 2/14427 Structure of ink jet print heads with thermal bend detached actuators
• CPC Class Codes: B41J 2/16585 for paper-width or non-reciprocating print heads
• CPC Class Codes: B41J 2/17513 Inner structure
• CPC Class Codes: B41J 2/17596 Ink pumps, ink valves
• CPC Class Codes: B41J 2002/041 Electromagnetic transducer
• CPC Class Codes: B41J 2202/21 Line printing
• CPC Class Codes: B41J 3/445 Printers integrated in other types of apparatus, e.g. printers integrated in cameras
• CPC Class Codes: B82Y 30/00 Nanotechnology for materials or surface science, e.g. nanocomposites
• CPC Class Codes: G06F 15/00 Digital computers in general details G06F1/00 – G06F13/00; Data processing equipment in general
• CPC Class Codes: G06F 21/79 in semiconductor storage media, e.g. directly-addressable memories
• CPC Class Codes: G06F 21/86 Secure or tamper-resistant housings
• CPC Class Codes: G06F 2221/2129 Authenticate client device independently of the user
• CPC Class Codes: G06F 7/57 Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations G06F7/49, G06F7/491 take precedence
• CPC Class Codes: G06F 9/226 Microinstruction function, e.g. input/output microinstruction; diagnostic microinstruction; microinstruction format
• CPC Class Codes: G06F 9/265 by address selection on input of storage
• CPC Class Codes: G06F 9/30094 : Condition code generation, e.g. Carry, Zero flag
• CPC Class Codes: G06F 9/30101 : Special purpose registers
• CPC Class Codes: G06F 9/3885 : using a plurality of independent parallel functional units
• CPC Class Codes: G06K 1/121 : by printing code marks applying code marks to labels B65C9/46; marking or coding completed packages B65B61/26
• CPC Class Codes: G06K 15/00 : Arrangements for producing a permanent visual presentation of the output data , e.g. computer output printersprinting or plotting combined with another operation, e.g. with conveying, G06K17/00
• CPC Class Codes: G06K 19/06037 : multi-dimensional coding
• CPC Class Codes: G06K 19/073 : Special arrangements for circuits, e.g. for protecting identification code in memory protection against unauthorised use of computer memory G06F12/14
• CPC Class Codes: G06K 7/10762 : Relative movement
• CPC Class Codes: G06K 7/14 : using light without selection of wavelength, e.g. sensing reflected white light G06K7/10831 - G06K7/1097 take precedence
• CPC Class Codes: G06K 7/1417 : 2D bar codes
• CPC Class Codes: G11C 11/56 : using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
• CPC Class Codes: H01L 23/576 : using active circuits
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 : Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H04N 1/00127 : Connection or combination of a still picture apparatus with another apparatus, e.g. for storage, processing or transmission of still picture signals or of information associated with a still picture
• CPC Class Codes: H04N 1/00278 : with a printing apparatus, e.g. a laser beam printer
• CPC Class Codes: H04N 1/00326 : with a data reading, recognizing or recording apparatus, e.g. with a bar-code apparatus arrangements for the associated working of recording or reproducing apparatus with related apparatus G11B31/00
• CPC Class Codes: H04N 1/0044 : for image preview or review, e.g. to help the user position a sheet
• CPC Class Codes: H04N 1/00965 : using a plug-in memory module, e.g. memory card, memory stick
• CPC Class Codes: H04N 1/00968 : by scanning marks on a sheet mark-sheet input means H04N1/00355; sensing record carriers G06K7/00
• CPC Class Codes: H04N 1/2112 : using still video cameras
• CPC Class Codes: H04N 1/2154 : the still video camera incorporating a hardcopy reproducing device, e.g. a printer
• CPC Class Codes: H04N 1/32101 : Display, printing, storage or transmission of additional information, e.g. ID code, date and time or title
• CPC Class Codes: H04N 1/32133 : on the same paper sheet, e.g. a facsimile page header
• CPC Class Codes: H04N 1/32561 : using a programmed control device, e.g. a microprocessor
• CPC Class Codes: H04N 1/32587 : Controller
• CPC Class Codes: H04N 1/32593 : Using a plurality of controllers, e.g. for controlling different interfaces
• CPC Class Codes: H04N 1/32603 : Multi-bus systems
• CPC Class Codes: H04N 1/46 : Colour picture communication systems
• CPC Class Codes: H04N 2101/00 : Still video cameras
• CPC Class Codes: H04N 2201/0008 : Connection or combination of a still picture apparatus with another apparatus
• CPC Class Codes: H04N 2201/0084 : Digital still camera
• CPC Class Codes: H04N 2201/3222 : of processing required or performed, e.g. forwarding, urgent or confidential handling
• CPC Class Codes: H04N 2201/3261 : of multimedia information, e.g. a sound signal
• CPC Class Codes: H04N 2201/3264 : of sound signals
• CPC Class Codes: H04N 2201/3269 : of machine readable codes or marks, e.g. bar codes or glyphs
• CPC Class Codes: H04N 2201/3276 : of a customised additional information profile, e.g. a profile specific to a user ID
• CPC Class Codes: H04N 2201/328 : Processing of the additional information
• CPC Class Codes: H04N 23/00 : Cameras or camera modules comprising electronic image sensors; Control thereof
• CPC Class Codes: H04N 23/40 : Circuit details for pick-up tubes
• CPC Class Codes: H04N 23/70 : Circuitry for compensating brightness variation in the scene
• CPC Class Codes: H04N 23/80 : Camera processing pipelines; Components thereof
• CPC Class Codes: H04N 25/75 : Circuitry for providing, modifying or processing image signals from the pixel array
• CPC Class Codes: H04N 5/2628 : Alteration of picture size, shape, position or orientation, e.g. zooming, rotation, rolling, perspective, translation
• CPC Class Codes: H04N 5/76 : Television signal recording

Abstract

A camera with a CMOS image sensor, an image sensor interface for receiving data from the CMOS image sensor and multiple processing units interconnected with each other for parallel processing of data from the image sensor interface. The multiple processing units and the image sensor interface are integrated onto a single chip.

Claims

1. An electronic device, comprising:

an image sensor;

an image sensor interface for receiving input data from the image sensor;

an instruction input interface configured to receive a signal and decode the signal into image processing instructions, wherein an example image corresponding to the image processing instructions comprises an image distorted by a particular effect of executing the image processing instructions; and

multiple processing units interconnected with each other for parallel processing of data from the image sensor interface to generate an output image based on distorting an input image corresponding to the input data by the particular effect.

2. The electronic device according to claim 1, wherein each of the multiple processing units includes rewritable memory storing microcode to operatively control the processing unit.

3. The camera according to claim 1, wherein the signal is based on a pattern in a machine readable form.

4. The electronic device according to claim 1, further comprising:

a crossbar switch, wherein the crossbar switch interconnects each of the multiple processing units.

5. The electronic device according to claim 4, further comprising:

an input FIFO (first in, first out) configured for receiving data from the image sensor interface and inputting the data to the multiple processing units; and

an output FIFO configured for receiving processed data to be read by other components of the electronic device.

6. The electronic device according to claim 5, further comprising:

a central processing unit configured to operatively control the multiple processing units; and

a data bus configured to connect the central processing unit to the input FIFO and the output FIFO.

7. The electronic device according to claim 6, further comprising:

a data cache configured to store the processed data until required by the central processing unit.

8. The electronic device according to claim 1, wherein the multiple processing units perform one or more processing tasks selected from:

rotating the input image;

color converting the input image; and

dithering the input image.

9. The electronic device according to claim 1, further comprising:

a display; and

a display interface, the display interface being connected to a data cache for reading processed data and transmitting the processed data to the display.

10. The electronic device according to claim 9, wherein each of the multiple processing units includes at least one address generator for the processed data sent to the data cache.

11. The electronic device according to claim 2, further comprising:

a keyboard interface configured for user input of instructions for rewriting the rewritable memory within each of the processing units.

12. A processor, comprising:

an image sensor interface for receiving input data from an image sensor;

an instruction input interface configured to receive a signal and decode the signal into image processing instructions, wherein an example image corresponding to the image processing instructions comprises an image distorted by a particular effect of executing the image processing instructions; and

multiple processing units interconnected with each other for parallel processing of data from the image sensor interface to generate an output image based on distorting an input image corresponding to the input data by the particular effect.

13. The processor according to claim 12, further comprising a crossbar switch for interconnecting each of the multiple processing units.

14. The processor according to claim 12, further comprising:

an input FIFO (first in, first out) configured to receive data from the first and second image sensor interfaces and input the data to the multiple processing units; and

an output FIFO configured to receive processed data to be read by other components of an electronic device that includes the processor.

15. The processor according to claim 14, further comprising:

a central processing unit; and

a data bus connecting the central processing unit to the input FIFO and the output FIFO, the central processing unit providing a processing core to operatively control the multiple processing units.

16. The processor according to claim 15, wherein each of the multiple processing units has RAM (random access memory) for storing microcode written by the central processing unit to operatively control the processing unit.

17. The processor according to claim 16, wherein the processor further includes a keyboard interface for user input of instructions to the central processing unit such that the central processing unit rewrites the microcode in the RAM within each of the multiple processing units.

18. The processor according to claim 15, further comprising a data cache to store the processed data until required by the central processing unit.

19. The electronic device according to claim 18, wherein each of the multiple processing units includes at least one address generator for the processed data sent to the data cache.

20. The electronic device according to claim 12, wherein the signal is based on a pattern in a machine readable form.