Array substrate, method for manufacturing the same and display apparatus
First Claim
1. A method for manufacturing an array substrate, comprising procedures of:
- forming a common electrode line (5), a common electrode (2) and a thin film transistor on a substrate (1), wherein the thin film transistor comprises a gate electrode (4), a source electrode (8a) and a drain electrode (8b); and
forming an insulating layer (3) between the gate electrode (4) and the common electrode (2) to isolate the gate electrode (4) from the common electrode (2), wherein the method comprises the following steps;
step A, forming the common electrode (2), the insulating layer (3), the gate electrode (4) and the common electrode line (5) on the substrate (1);
step B, forming a gate electrode protection layer (6), an active layer (7), the source electrode (8a) and the drain electrode (8b) on a resultant structure of the step A;
step C, forming a passivation layer (9) on a resultant structure of the step B, wherein a second through hole (12) is formed in the passivation layer (9); and
step D, forming a pixel electrode (10) on a resultant structure of the step C, wherein the pixel electrode (10) is connected with the drain electrode (8b) through the second through hole (12).
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Accused Products
Abstract
An array substrate, a method for manufacturing the same and a display apparatus are provided. The array substrate comprises: a substrate (1); a common electrode (2) and a pixel electrode (10) sequentially formed on the substrate (1) and insulated from each other; a thin film transistor comprising a gate electrode (4), an active layer (7), a source electrode (8a) and a drain electrode (8b), wherein the drain electrode (8b) is electrically connected with the pixel electrode (10); a common electrode line (5) disposed in a same layer as the gate electrode (4); and an insulating layer (3) between the gate electrode (4) and the common electrode (2), wherein the common electrode (2) is connected with the common electrode line (5) through a through hole in the insulating layer (3).
4 Citations
5 Claims
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1. A method for manufacturing an array substrate, comprising procedures of:
- forming a common electrode line (5), a common electrode (2) and a thin film transistor on a substrate (1), wherein the thin film transistor comprises a gate electrode (4), a source electrode (8a) and a drain electrode (8b); and
forming an insulating layer (3) between the gate electrode (4) and the common electrode (2) to isolate the gate electrode (4) from the common electrode (2), wherein the method comprises the following steps;
step A, forming the common electrode (2), the insulating layer (3), the gate electrode (4) and the common electrode line (5) on the substrate (1);
step B, forming a gate electrode protection layer (6), an active layer (7), the source electrode (8a) and the drain electrode (8b) on a resultant structure of the step A;
step C, forming a passivation layer (9) on a resultant structure of the step B, wherein a second through hole (12) is formed in the passivation layer (9); and
step D, forming a pixel electrode (10) on a resultant structure of the step C, wherein the pixel electrode (10) is connected with the drain electrode (8b) through the second through hole (12). - View Dependent Claims (2, 3, 4, 5)
- forming a common electrode line (5), a common electrode (2) and a thin film transistor on a substrate (1), wherein the thin film transistor comprises a gate electrode (4), a source electrode (8a) and a drain electrode (8b); and
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