Driving method of an electric circuit

• US 9,153,187 B2
• Filed: 04/15/2013
• Issued: 10/06/2015
• Est. Priority Date: 07/31/2000
• Status: Expired due to Term

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Tanaka, Yukio
• Primary Examiner(s): NGUYEN, JENNIFER T
• Application Number:
  US13/862,539
• Publication Number:
  US 20130241813A1
• Time in Patent Office: 904 Days
• Field of Search: 345 76-100, 345/204, 345/690
• US Class Current: 1/1
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: G09G 3/3688 suitable for active matrices only
• CPC Class Codes: H03K 17/145 in field-effect transistor switches
• CPC Class Codes: H03K 17/687 the devices being field-effect transistors
• CPC Class Codes: H03K 17/6872 using complementary field-effect transistors
• CPC Class Codes: H03K 17/693 Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors logic circuits H03K19/00; code converters H03M5/00, H03M7/00

Abstract

A variation in threshold may be suppressed by structuring an analog switch by a MOS transistor and forming a signal synchronized to a clock by making the clock which is a common signal in continuity or discontinuity. An object of the present invention is to reduce the variation in the signal synchronized to the clock by the variation in threshold of the MOS transistor in a circuit which is synchronized to the clock.

Claims

1. An active matrix display device comprising:

a pixel portion over a substrate, the pixel portion comprising a first TFT; and

a driver circuit over the substrate, the driver circuit comprising;

a flip-flop comprising a second TFT;

a first analog switch; and

a second analog switch,

wherein switching of the first analog switch and switching of the second analog switch are controlled depending on an output signal of the flip-flop,

wherein a first clock signal is input to an input terminal of the first analog switch, and

wherein a second clock signal is input to an input terminal of the second analog switch.

2. An active matrix display device according to claim 1, wherein the first analog switch and the second analog switch comprise a MOS transistor or a MIS transistor.

3. An active matrix display device according to claim 1, wherein the flip-flop comprises a first inverter, a second inverter, a first NAND and a second NAND.

4. An active matrix display device according to claim 1, wherein a first wiring is electrically connected to an output terminal of the first analog switch and a flip-flop in a next stage.

5. An active matrix display device according to claim 1, wherein a shift register comprises the flip-flop, the first analog switch, and the second analog switch.

6. An active matrix display device according to claim 1, wherein the second clock signal is a signal which has an opposite phase to the first clock signal.

7. An active matrix display device comprising:

a pixel portion over a substrate, the pixel portion comprising a first TFT;

a gate driver circuit over the substrate, the gate driver circuit comprising;

a flip-flop comprising a second TFT;

a first analog switch; and

a second analog switch; and

a gate signal line directly connected to a gate of the first TFT, and electrically connected to the gate driver circuit,

wherein switching of the first analog switch and switching of the second analog switch are controlled depending on an output signal of the flip-flop, and

wherein switching of the first TFT is controlled depending on an output signal of the first analog switch.

8. An active matrix display device according to claim 7, wherein the first analog switch and the second analog switch comprise a MOS transistor or a MIS transistor.

9. An active matrix display device according to claim 7, wherein the flip-flop comprises a first inverter, a second inverter, a first NAND and a second NAND.

10. An active matrix display device according to claim 7, wherein a first wiring is electrically connected to an output terminal of the first analog switch and a flip-flop in a next stage.

11. An active matrix display device according to claim 7, wherein a shift register comprises the flip-flop, the first analog switch, and the second analog switch.

12. An active matrix display device according to claim 7, wherein the gate signal line is directly connected to the gate driver circuit.

13. An active matrix display device comprising:

a pixel portion over a substrate, the pixel portion comprising a first TFT;

a gate driver circuit over the substrate, the gate driver circuit comprising;

a flip-flop comprising a second TFT;

a first analog switch; and

a second analog switch; and

a gate signal line directly connected to a gate of the first TFT, the gate signal line electrically connected to the gate driver circuit,

wherein switching of the first analog switch and switching of the second analog switch are controlled depending on an output signal of the flip-flop,

wherein a first clock signal is input to an input terminal of the first analog switch,

wherein a second clock signal is input to an input terminal of the second analog switch, and

wherein switching of the first TFT is controlled depending on an output signal of the first analog switch.

14. An active matrix display device according to claim 13, wherein the first analog switch and the second analog switch comprise a MOS transistor or a MIS transistor.

15. An active matrix display device according to claim 13, wherein the flip-flop comprises a first inverter, a second inverter, a first NAND and a second NAND.

16. An active matrix display device according to claim 13, wherein a first wiring is electrically connected to an output terminal of the first analog switch and a flip-flop in a next stage.

17. An active matrix display device according to claim 13, wherein a shift register comprises the flip-flop, the first analog switch, and the second analog switch.

18. An active matrix display device according to claim 13, wherein the second clock signal is a signal which has an opposite phase to the first clock signal.

19. An active matrix display device according to claim 13, wherein the gate signal line is directly connected to the gate driver circuit.

20. An active matrix display device comprising:

a pixel portion over a substrate, the pixel portion comprising a first TFT; and

a driver circuit over the substrate, the driver circuit comprising;

a flip-flop comprising a second TFT; and

an analog switch,

wherein switching of the analog switch is controlled depending on an output signal of the flip-flop, and

wherein a clock signal is input to an input terminal of the analog switch.

21. An active matrix display device according to claim 20, wherein the analog switch comprises a MOS transistor or a MIS transistor.

22. An active matrix display device according to claim 20, wherein the flip-flop comprises a first inverter, a second inverter, a first NAND and a second NAND.

23. An active matrix display device according to claim 20, wherein a first wiring is electrically connected to output terminal of the analog switch and a flip-flop in a next stage.

24. An active matrix display device according to claim 20, wherein a shift register comprises the flip-flop and the analog switch.

25. An active matrix display device comprising:

a pixel portion over a substrate, the pixel portion comprising a first TFT; and

a gate driver circuit over the substrate, the gate driver circuit comprising;

a flip-flop comprising a second TFT; and

an analog switch,

wherein switching of the analog switch is controlled depending on an output signal of the flip-flop,

wherein a clock signal is input to an input terminal of the analog switch, and

wherein switching of the first TFT is controlled depending on an output signal of the analog switch.

26. An active matrix display device according to claim 25, wherein the analog switch comprises a MOS transistor or a MIS transistor.

27. An active matrix display device according to claim 25, wherein the flip-flop comprises a first inverter, a second inverter, a first NAND and a second NAND.

28. An active matrix display device according to claim 25, wherein a first wiring is electrically connected to output terminal of the analog switch and a flip-flop in a next stage.

29. An active matrix display device according to claim 25, wherein a shift register comprises the flip-flop and the analog switch.

30. An active matrix display device comprising:

a pixel portion over a substrate, the pixel portion comprising a first TFT;

a gate driver circuit over the substrate, the gate driver circuit comprising;

a flip-flop comprising a second TFT; and

an analog switch; and

a gate signal line directly connected to a gate of the first TFT, the gate signal line electrically connected to the gate driver circuit,

wherein switching of the analog switch is controlled depending on an output signal of the flip-flop,

wherein a clock signal is input to an input terminal of the analog switch, and

wherein switching of the first TFT is controlled depending on an output signal of the analog switch.

31. An active matrix display device according to claim 30, wherein the analog switch comprises a MOS transistor or a MIS transistor.

32. An active matrix display device according to claim 30, wherein the flip-flop comprises a first inverter, a second inverter, a first NAND and a second NAND.

33. An active matrix display device according to claim 30, wherein a first wiring is electrically connected to output terminal of the analog switch and a flip-flop in a next stage.

34. An active matrix display device according to claim 30, wherein a shift register comprises the flip-flop and the analog switch.

35. An active matrix display device according to claim 30, wherein the gate signal line is directly connected to the gate driver circuit.