Digital predistortion of a power amplifier for signals comprising widely spaced carriers

• US 9,184,710 B2
• Filed: 02/07/2012
• Issued: 11/10/2015
• Est. Priority Date: 02/09/2011
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Braithwaite, Richard Neil
• Primary Examiner(s): Wong, Linda
• Application Number:
  US13/368,125
• Publication Number:
  US 20120200355A1
• Time in Patent Office: 1,372 Days
• Field of Search: 375/219, 375/222, 375229-236, 375/284, 375/285, 375/296, 375/297, 375/298, 375/299, 375/316, 375/318, 375/317, 375/319, 375/312, 375/311, 375346-350, 375/220, 375/221, 37524026-24029, 375/278, 375/295, 375/306, 375/307, 375/302, 375/324, 375/325, 375/347, 375/340, 375/339, 375/354, 375/358
• US Class Current: 1/1
• CPC Class Codes: H03F 1/3241 using predistortion circuits H03F1/3211, H03F1/3217 take precedence
• CPC Class Codes: H03F 1/3247 using feedback acting on predistortion circuits H03F1/3264 takes precedence
• CPC Class Codes: H03F 1/3258 based on polynomial terms
• CPC Class Codes: H03F 2201/3209 the amplifier comprising means for compensating memory effects
• CPC Class Codes: H03F 2201/3224 Predistortion being done for compensating memory effects
• CPC Class Codes: H03F 3/189 High-frequency amplifiers, e.g. radio frequency amplifiers
• CPC Class Codes: H03F 3/24 of transmitter output stages
• CPC Class Codes: H04B 1/0028 wherein the AD/DA conversion occurs at baseband stage
• CPC Class Codes: H04B 2001/0425 with linearisation using predistortion
• CPC Class Codes: H04L 27/368 adaptive predistortion

Abstract

Digital predistortion (“DPD”) of an RF power amplifier for signals comprising two widely spaced carrier clusters is proposed. The basis waveforms within the DPD are selected to allow for the use of a lower sampling rate. As one example, multi-carrier signals spanning 60 MHz of bandwidth may be linearized using a sample rate of 100 MHz for the DPD module and the observation path, as opposed to a sample rate exceeding 300 MHz (5 times Nyquist) used conventionally. A transmit (Tx) filter is located after the power amplifier to attenuate distortion modes exceeding the sampling rate used.

Claims

1. A predistortion linearized amplifier system for amplifying a communication signal comprising:

a digital predistorter comprising;

a first component signal path and a second component signal path, each component signal path comprising;

an input, each input adapted to receive a signal component of a communication signal the communication signal having at least a first signal component comprising a first carrier cluster and a second separate signal components comprising a second carrier cluster separate from the first carrier cluster;

up-sampler circuitry that receives the signal component from the input;

input delay circuitry that receives a first up-sampled signal from the up-sampler;

an intermodulation distortion product generator that receives the first up-sampled signal from the up-sampler and a second up-sampled signal from corresponding up-sampler circuitry of another component signal path;

an addition circuit coupled to an output of input delay circuitry and an output of the intermodulation distortion product generator; and

a multiplier coupled to an output of the addition circuit;

combiner circuitry coupled to an output of the multiplier of the first component signal path and the multiplier of the second component signal path that generates a combined predistorted output signal;

a digital to analog converter coupled to the combiner circuitry receive the combined predistorted output signal and provide an analog signal; and

,

a power amplifier coupled to the digital to analog converter and configured to amplify the analog signal to provide an amplified analog signal.

2. A predistortion linearized amplifier system as set out in claim 1, further comprising:

a bandpass filter coupled to the power amplifier and configured to filter the amplified analog signal to provide a bandpass filtered signal;

an output sampling coupler coupled to the bandpass filter and configured to sample the bandpass filtered signal to provide a sampled bandpass filtered signal;

a feedback circuit path coupled to the output sampling coupler comprising an analog to digital convertor converting the sampled bandpass filtered signal to a digital sampled signal representative of the bandpass filtered signal; and

,

a coefficient estimator receiving the digital sampled signal and the first and second separate signal components and providing the first and second predistortion coefficients to the digital predistorter.

3. A pre distortion linearized amplifier system as set out in claim 1, wherein the digital predistorter is a memory less digital predistorter.

4. A pre distortion linearized amplifier system as set out in claim 1, wherein the addition circuit of each component signal path is coupled to the intermodulation distortion product generator of the corresponding component signal path via multiplier circuitry of the corresponding component signal path and an anti-aliasing filter of the corresponding component signal path.

5. A predistortion linearized amplifier system for amplifying a communication signal having at least first and second separate signal components, comprising:

one or more inputs adapted to receive a communication signal, the communication signal having at least first and second separate signal components;

a digital predistorter coupled to the one or more inputs and receiving a delayed first up-sampled signal and a delayed second up-sampled signal of the at least first and second separate signal components,

the digital predistorter outputting a combined predistorted output signal, wherein a first predistorted output signal of the combined predistorted output signal is based on a first predistortion coefficient, a first set of intermodulation distortion products and the delayed first up-sampled signal, and wherein a second predistorted output signal of the combined predistorted output signal is based on a second predistortion coefficient, a second set of intermodulation distortion products and the delayed second up-sampled signal,

a digital to analog converter coupled to receive the combined predistorted output signal and provide an analog signal; and

,

a power amplifier coupled to the digital to analog converter and configured to amplify the analog signal to provide an amplified analog signal;

wherein the digital predistorter comprises;

a first up-sampler adapted to receive the first separate signal component and providing a first up-sampled signal;

a first delay coupled to the first up-sampler and providing the delayed first up-sampled signal;

a second up-sampler adapted to receive the second separate signal component and providing a second up-sampled signal; and

a second delay coupled to the second up-sampler and providing the delayed second up-sampled signal;

a first intermodulation distortion product generator receiving the first and second up-sampled signals, the first intermodulation distortion product generator providing the first set of intermodulation distortion products of the first and second up-sampled signals;

a first multiplier circuit coupled to the first intermodulation distortion generator which receives and applies the first pre distortion coefficients to the first set of intermodulation distortion products to provide a first pre distortion signal;

a first combiner adapted to receive the delayed first up-sampled signal and coupled to the first multiplier circuit, the first combiner providing a first predistorted input signal based on the delayed first up-sampled signal and the first pre distortion signal;

a second intermodulation distortion product generator receiving the first and second up-sampled signals, the second intermodulation distortion generator providing the second set of intermodulation distortion products of the first and second up-sampled signals;

a second multiplier circuit coupled to the second intermodulation distortion generator which receives and applies the second predistortion coefficients to the second set of intermodulation distortion products to provide a second predistortion signal; and

a second combiner adapted to receive the delayed second up-sampled signal and coupled to the second multiplier circuit, the second combiner providing a second predistorted input signal based on the delayed second up-sampled signal and the second predistortion signal.

6. A predistortion linearized amplifier system as set out in claim 5, wherein the digital predistorter further comprises:

a first digital oscillator providing a first digital intermediate signal;

a first oscillator multiplier which receives and combines the first predistorted input signal and the first digital intermediate signal to provide the first predistorted output signal;

a second digital oscillator providing a second digital intermediate signal; and

,

a second oscillator multiplier which receives and combines the second predistorted input signal and the second digital intermediate signal to provide the second predistorted output signal.

7. A predistortion linearized amplifier system as set out in claim 5, wherein the first and second up-samplers are adapted to up sample the first and second separate signal components at a sampling rate to approximately match the bandwidth of the bandpass filter.

8. A predistortion linearized amplifier as set out in claim 7, wherein the bandpass filter attenuates distortion modes exceeding the sampling rates of the first and second up-samplers.

9. A predistorter for use in predistortion of a communication signal having at least first and second separate signal components, comprising:

a first input adapted for receiving a first separate signal component;

a second input adapted for receiving a second separated signal component;

a first intermodulation distortion compensation circuit receiving first predistortion coefficients and the first and second separate signal components, the first intermodulation distortion compensation circuit creating a first set of intermodulation distortion products and providing a first predistorted output signal based on the first set of intermodulation distortion products, the first predistortion coefficients, and the first separate signal component;

a second intermodulation distortion compensation circuit receiving second predistortion coefficients and the first and second separate signal components, the second intermodulation distortion compensation circuit creating a second set of intermodulation distortion products and providing a second predistorted output signal based on the second set of intermodulation distortion products, the second predistortion coefficients, and the second separate signal component;

a first up-sampler coupled to the first input and providing a first up-sampled signal; and

,

a second up-sampler coupled to the second input and providing a second up-sampled signal;

wherein the first and second intermodulation distortion compensation circuits operate on the first and second up-sampled signals, and,

a combiner circuit which receives and combines the first and second predistorted output signals to provide a combined predistorted output signal; and

wherein;

the first intermodulation distortion compensation circuit comprises;

a first intermodulation distortion product generator providing the first set of intermodulation distortion products of the first and second separate signal components;

a first multiplier circuit coupled to the first intermodulation product distortion generator which receives and applies the first predistortion coefficients to the first set of intermodulation distortion products to provide a first predistortion signal;

a first combiner coupled to the first input and the first multiplier circuit, the first combiner providing a first predistorted input signal based on the first separate signal component and the first pre distortion signal;

a first digital oscillator providing a first digital intermediate signal; and

a first oscillator multiplier which receives and combines the first predistorted input signal and the first digital intermediate signal to provide the first predistorted output signal; and

wherein the second intermodulation distortion compensation circuit comprises;

a second intermodulation distortion product generator providing the second set of intermodulation distortion products of the first and second separate signal components;

a second multiplier circuit coupled to the second intermodulation distortion product generator which receives and applies the second pre distortion coefficients to the second set of intermodulation distortion products to provide a second predistortion signal;

a second combiner coupled to the second input and the second multiplier circuit, the second combiner providing a second predistorted input signal based on the second separate signal component and the second predistortion signal;

a second digital oscillator providing a second digital intermediate signal; and

,

a second oscillator multiplier which receives and combines the second predistorted input signal and the second digital intermediate signal to provide the second predistorted output signal.

10. A predistorter as set out in claim 9, wherein the predistorter compensates for the third order intermodulation products of the first and second separate signal components.

11. A predistorter as set out in claim 9, wherein the first and second up-samplers are adapted to up sample the first and second separate signal components at a sampling rate to approximately match the allowed transmission bandwidth of the communication signal.

12. A method for predistortion linearization of a signal in a communication system, the signal having two separate components, the method comprising:

receiving a first input signal component at a first input;

providing a delayed first up-sampled signal of the first input signal component from a first up-sampler coupled to the first input;

receiving a second input signal component at a second input;

providing a delayed second up-sampled signal of the second input signal component from a second up-sampler coupled to the second input;

receiving first predistortion coefficients and the first and second separate signal components at a first intermodulation distortion compensation circuit, the first intermodulation distortion compensation circuit creating a first set of intermodulation distortion products and providing a first predistorted output signal based on the first set of intermodulation distortion products, the first predistortion coefficients, and the first separate signal component;

receiving second predistortion coefficients and the first and second separate signal components at a second intermodulation distortion compensation circuit, the second intermodulation distortion compensation circuit creating a second set of intermodulation distortion products and providing a second predistorted output signal based on the second set of intermodulation distortion products, the second predistortion coefficients, and the second separate signal component;

providing a first predistorted output signal based on the first set of intermodulation distortion products of the first and second input signal components, the first predistortion coefficients, and the delayed first up-sampled signal by;

providing the first set of intermodulation distortion products of the first and second separate signal components using a first intermodulation distortion product generator;

receiving and applying the first predistortion coefficients to the first set of intermodulation distortion products to provide a first predistortion signal using a first multiplier circuit coupled to the first intermodulation product distortion generator;

providing a first predistorted input signal based on the first separate signal component and the first predistortion signal using a first combiner coupled to the first input and the first multiplier circuit;

providing a first digital intermediate signal using a first digital oscillator; and

receiving and combining the first predistorted input signal and the first digital intermediate signal to provide the first predistorted output signal using a first oscillator multiplier;

providing a second predistorted output signal based on the second set of intermodulation distortion products of the first and second signal components, the second predistortion coefficients, and the delayed second up-sampled signal by;

providing the second set of intermodulation distortion products of the first and second separate signal components using a second intermodulation distortion product generator;

receiving and applying the second predistortion coefficients to the second set of intermodulation distortion products to provide a second predistortion signal using a second multiplier circuit coupled to the second intermodulation distortion product generator;

providing a second predistorted input signal based on the second separate signal component and the second predistortion signal using a second combiner coupled to the second input and the second multiplier circuit;

providing a second digital intermediate signal using a second digital oscillator; and

,

receiving and combining the second predistorted input signal and the second digital intermediate signal to provide the second predistorted output signal using a second oscillator multiplier; and

,

combining the first and second predistorted output signals using a combiner circuit to provide a combined predistorted output signal.

13. A method for pre distortion linearization as set out in claim 12, wherein the first and second set of intermodulation distortion products comprise third order intermodulation product signals.

14. A method for predistortion linearization as set out in claim 13, further comprising:

converting the combined predistorted output signal into an analog output signal; and

,

filtering the analog output signal by a transmission filter to provide a bandpass filtered signal;

wherein the third order intermodulation product signals comprise intermodulation product signals having frequencies within the transmission filter passband.

15. A method for predistortion linearization as set out in claim 14, further comprising:

sampling the bandpass filtered signal to provide a sampled bandpass filtered signal; and

, adaptively estimating the first and second predistortion coefficients based on the sampled bandpass filtered signal.

16. A method for predistortion linearization as set out in claim 15, wherein adaptively estimating the first and second predistortion coefficients further comprises comparing the sampled bandpass filtered signal with the first and second input signal components to adaptively update the first and second predistortion coefficients.

17. A method for predistortion linearization as set out in claim 16, wherein adaptively estimating the first and second predistortion coefficients further comprises computing iteratively updated first and second predistortion coefficients based on prior first and second predistortion coefficients, respectively.

18. A method for predistortion linearization as set out in claim 14, further comprising up sampling the first and second input signal components at a sampling rate that meets or exceeds the bandwidth of the transmission filter passband.

19. A method for predistortion linearization as set out in claim 14, wherein the frequencies of the first and second signals span the bandwidth of the transmission filter passband.