Voltage regulator, voltage regulating system, memory chip, and memory device

• US 9,188,999 B2
• Filed: 05/15/2013
• Issued: 11/17/2015
• Est. Priority Date: 07/12/2012
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Lee, Joo-Sung, Heo, Dong-Hun
• Primary Examiner(s): Ho, Hoai V
• Assistant Examiner(s): HOANG, TRI M
• Application Number:
  US13/894,678
• Publication Number:
  US 20140016425A1
• Time in Patent Office: 916 Days
• US Class Current: 1/1
• CPC Class Codes: G05F 1/10 Regulating voltage or current G05F1/02 takes precedence; for electric railways B60M3/02
• CPC Class Codes: G05F 1/56 using semiconductor devices in series with the load as final control devices G05F1/461 takes precedence
• CPC Class Codes: G05F 1/565 sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor G05F1/563 takes precedence
• CPC Class Codes: G11C 29/021 in voltage or current generators
• CPC Class Codes: G11C 29/028 with adaption or trimming of parameters
• CPC Class Codes: G11C 5/14 Power supply arrangements , e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
• CPC Class Codes: H02J 1/00 Circuit arrangements for dc mains or dc distribution networks

Abstract

A voltage regulator comprises a power source terminal configured to supply a power source voltage; an output terminal configured to output a load current; a first transistor which is connected between the power source terminal and the output terminal, is enabled by a signal applied from an amplifier in a first mode to generate a first current, and outputs the first current to the output terminal; and a second transistor which is connected between the power source terminal and the output terminal, is enabled by a signal applied from the amplifier in a second mode to generate a second current different from the first current, and outputs the second current to the output terminal, wherein the first transistor is enabled in the second mode, and the second transistor is disabled in the first mode.

Claims

1. A voltage regulator comprising:

a power source terminal configured to supply a power source voltage;

an output terminal configured to output a load current;

a first transistor which have a first terminal connected to the power source terminal, a second terminal connected to the output terminal, and a gate terminal connected to an amplifier;

a second transistor which have a first terminal connected to the power source terminal, a second terminal connected to the output terminal, and a gate terminal connected to one end of each of a First switch and a second switch,

wherein the other end of the first switch is connected to the power source terminal, and the other end of the second switch is connected to the amplifier; and

a third transistor having a first terminal connected to the power source terminal, a second terminal connected to the output terminal, and a gate terminal connected to one end of each of a third switch and a fourth switch,

wherein the other end of the third switch is connected to the power source terminal, and the other end of the fourth switch is connected to the amplifier,

wherein, in a first mode, the first switch and the third switch are turned on, and the second switch and the fourth switch are turned off,

wherein in a second mode different from the first mode, the second switch and the third switch are turned on, and the first switch and the fourth switch are turned off, and

wherein in a third mode different from the first and second modes, the second switch and the fourth switch are turned on, and the first switch and the third switch are turned off, and

wherein an output of the amplifier in the first mode is the same as an output of the amplifier in the second mode and the output of the amplifier in the second mode is the same as an output of the amplifier in the third mode.

2. The voltage regulator of claim 1, wherein the first switch is turned on in a first mode, and turned off in a second mode and wherein the second mode is different from the first mode.

3. The voltage regulator of claim 2, wherein the second switch is turned off in the first mode, and turned on in the second mode.

4. The voltage regulator of claim 3, wherein the first mode comprises a power saving mode, and the second mode comprises an active mode.

5. The voltage regulator of claim 1, wherein the first transistor and the second transistor comprise PMOS transistors.

6. The voltage regulator of claim 1, wherein a size of the first transistor is different from a size of the second transistor.

7. The voltage regulator of claim 6, wherein the size of the second transistor is larger than the size of the first transistor.