Semiconductor device

• US 9,202,546 B2
• Filed: 10/25/2010
• Issued: 12/01/2015
• Est. Priority Date: 10/29/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Imai, Keitaro, Koyama, Jun
• Primary Examiner(s): Sengdara, Vongsavanh
• Application Number:
  US12/910,908
• Publication Number:
  US 20110101332A1
• Time in Patent Office: 1,863 Days
• Field of Search: 257/43, 257/E29.068
• US Class Current: 1/1
• CPC Class Codes: G11C 11/404 with one charge-transfer gate, e.g. MOS transistor, per cell
• CPC Class Codes: G11C 11/405 with three charge-transfer gates, e.g. MOS transistors, per cell
• CPC Class Codes: G11C 16/02 electrically programmable
• CPC Class Codes: H01L 21/8258 the substrate being a semiconductor, using a combination of technologies covered by H01L21/8206, H01L21/8213 , H01L21/822, H01L21/8252, H01L21/8254 or H01L21/8256
• CPC Class Codes: H01L 27/0688 Integrated circuits having a three-dimensional layout
• CPC Class Codes: H01L 27/088 the components being field-effect transistors with insulated gate
• CPC Class Codes: H01L 27/0922 Combination of complementary transistors having a different structure, e.g. stacked CMOS, high-voltage and low-voltage CMOS
• CPC Class Codes: H01L 27/105 including field-effect components
• CPC Class Codes: H01L 27/12 the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H10B 12/20 DRAM devices comprising floating-body transistors, e.g. floating-body cells
• CPC Class Codes: H10B 41/70 the floating gate being an electrode shared by two or more components

Abstract

The semiconductor device includes: a transistor having an oxide semiconductor layer; and a logic circuit formed using a semiconductor material other than an oxide semiconductor. One of a source electrode and a drain electrode of the transistor is electrically connected to at least one input of the logic circuit, and at least one input signal is applied to the logic circuit through the transistor. The off-current of the transistor is preferably 1×10⁻¹³ A or less.

Claims

1. A semiconductor device comprising:

a first transistor including a channel formation region in an oxide semiconductor layer; and

a logic circuit comprising a second transistor including a channel formation region comprising a semiconductor material other than an oxide semiconductor,

wherein one of a source electrode and a drain electrode of the first transistor is electrically connected to at least one input of the logic circuit,

wherein the semiconductor device is designed so that an input signal is applied to the logic circuit through the first transistor when the first transistor is in an on state, and the input signal is stored at a gate electrode of the second transistor when the first transistor is in an off state, and

wherein the first transistor is provided above the logic circuit.

2. The semiconductor device according to claim 1, wherein an off-current of the first transistor is 1×

10<sup>−

17</sup> A/μ

m or less.

3. The semiconductor device according to claim 1, wherein a concentration of hydrogen in the oxide semiconductor layer is 5×

10¹⁹ atoms/cm³ or less.

4. The semiconductor device according to claim 1, wherein the at least one input of the logic circuit includes the gate electrode of the second transistor.

5. The semiconductor device according to claim 1, wherein the semiconductor material other than an oxide semiconductor is crystalline silicon.

6. The semiconductor device according to claim 1,

wherein the logic circuit further comprises a third transistor including a channel formation region comprising the semiconductor material other than an oxide semiconductor,

wherein the one of the source electrode and the drain electrode of the first transistor is electrically connected to the gate electrode of the second transistor,

wherein one of a source electrode and a drain electrode of the second transistor and one of a source electrode and a drain electrode of the third transistor are directly connected to each other,

wherein the third transistor is a diode-connected transistor.

7. The semiconductor device according to claim 6, further comprising a capacitor electrically connected to the gate electrode of the second transistor and the one of the source electrode and the drain electrode of the first transistor.

8. A semiconductor device comprising:

a first transistor including a first gate electrode, a first source electrode, and a first drain electrode over a substrate;

a second transistor including a second gate electrode, a second source electrode, and a second drain electrode over the substrate; and

a third transistor including a third gate electrode, a third source electrode, and a third drain electrode over the first transistor and the second transistor,

wherein channel formation regions of the first transistor and the second transistor are formed using a semiconductor material other than an oxide semiconductor;

wherein the third transistor includes a channel formation region in an oxide semiconductor layer;

wherein one of the first source electrode and the first drain electrode and one of the second source electrode and the second drain electrode are electrically connected to each other;

wherein the first gate electrode, the second gate electrode, and one of the third source electrode and the third drain electrode are directly connected to each other; and

wherein the semiconductor device is designed so that an input signal is applied to the first gate electrode and the second gate electrode through the third transistor when the third transistor is in an on state, and the input signal is stored at the first gate electrode and the second gate electrode when the third transistor is in an off state.

9. The semiconductor device according to claim 8, further comprising a capacitor electrically connected to the first gate electrode, the second gate electrode, and the one of the third source electrode and the third drain electrode.

10. The semiconductor device according to claim 8, wherein the first transistor is a p-channel transistor and the second transistor is an n-channel transistor.

11. The semiconductor device according to claim 8,

wherein the other of the third source electrode and the third drain electrode is electrically connected to a signal input wiring;

wherein the one of the first source electrode and the first drain electrode and the one of the second source electrode and the second drain electrode are electrically connected to a signal output wiring;

wherein the third gate electrode is electrically connected to a gate signal input wiring;

wherein the other of the first source electrode and the first drain electrode is electrically connected to a wiring for applying a first potential; and

wherein the other of the second source electrode and the second drain electrode is electrically connected to a wiring for applying a second potential.

12. The semiconductor device according to claim 8,

wherein each of the first transistor and the second transistor includes impurity regions provided to sandwich the channel formation region;

a gate insulating layer over the channel formation region;

the gate electrode over the gate insulating layer.

13. The semiconductor device according to claim 8, further comprising an insulating film over the first transistor and the second transistor,

wherein the third transistor includes:

the third gate electrode over the insulating film;

a third gate insulating layer over the third gate electrode;

the oxide semiconductor layer over the third gate insulating layer; and

the third source electrode and the third drain electrode which are electrically connected to the oxide semiconductor layer.

14. The semiconductor device according to claim 8, wherein an off-current of the third transistor is 1×

10<sup>−

17</sup> A/μ

m or less.

15. The semiconductor device according to claim 8, wherein the semiconductor material other than an oxide semiconductor is single crystalline silicon.

16. The semiconductor device according to claim 8, wherein the semiconductor material other than an oxide semiconductor is silicon.

17. The semiconductor device according to claim 8, wherein the oxide semiconductor layer includes an In—

Ga—

Zn—

O-based oxide semiconductor material.

18. The semiconductor device according to claim 8, wherein the oxide semiconductor layer includes an In₂Ga₂ZnO₇ crystal.

19. The semiconductor device according to claim 8, wherein a concentration of hydrogen in the oxide semiconductor layer is 5×

10¹⁹ atoms/cm³ or less.

20. A semiconductor device comprising:

a first transistor including a first gate electrode, a first source electrode, and a first drain electrode over a substrate;

a second transistor including a second gate electrode, a second source electrode, and a second drain electrode over the substrate; and

a third transistor including a third gate electrode, a third source electrode, and a third drain electrode over the first transistor and the second transistor,

wherein channel formation regions of the first transistor and the second transistor are formed using a semiconductor material other than an oxide semiconductor;

wherein the third transistor includes a channel formation region in an oxide semiconductor layer;

wherein one of the first source electrode and the first drain electrode and one of the second source electrode and the second drain electrode are electrically connected to each other;

wherein the first transistor is a diode-connected transistor;

wherein the second gate electrode and one of the third source electrode and the third drain electrode are directly connected to each other; and

wherein the semiconductor device is designed so that an input signal is applied to the second gate electrode through the third transistor when the third transistor is in an on state, and the input signal is stored at the second gate electrode when the third transistor is in an off state.

21. The semiconductor device according to claim 20, further comprising a capacitor electrically connected to the second gate electrode and the one of the third source electrode and the third drain electrode.

22. The semiconductor device according to claim 20, wherein the first transistor is an n-channel transistor and the second transistor is an n-channel transistor.

23. The semiconductor device according to claim 20,

wherein the other of the third source electrode and the third drain electrode is electrically connected to a signal input wiring;

wherein the one of the first source electrode and the first drain electrode and the one of the second source electrode and the second drain electrode are electrically connected to a signal output wiring;

wherein the third gate electrode is electrically connected to a gate signal input wiring;

wherein the other of the first source electrode and the first drain electrode is electrically connected to a wiring for applying a first potential; and

wherein the other of the second source electrode and the second drain electrode is electrically connected to a wiring for applying a second potential.

24. The semiconductor device according to claim 20,

wherein each of the first transistor and the second transistor includes impurity regions provided to sandwich the channel formation region;

a gate insulating layer over the channel formation region;

the gate electrode over the gate insulating layer.

25. The semiconductor device according to claim 20, further comprising an insulating film over the first transistor and the second transistor,

wherein the third transistor includes:

the third gate electrode over the insulating film;

a third gate insulating layer over the third gate electrode;

the oxide semiconductor layer over the third gate insulating layer; and

the third source electrode and the third drain electrode which are electrically connected to the oxide semiconductor layer.

26. The semiconductor device according to claim 20, wherein an off-current of the third transistor is 1×

10<sup>−

17</sup> A/μ

m or less.

27. The semiconductor device according to claim 20, wherein the semiconductor material other than an oxide semiconductor is single crystalline silicon.

28. The semiconductor device according to claim 20, wherein the semiconductor material other than an oxide semiconductor is silicon.

29. The semiconductor device according to claim 20, wherein the oxide semiconductor layer includes an In—

Ga—

Zn—

O-based oxide semiconductor material.

30. The semiconductor device according to claim 20, wherein the oxide semiconductor layer includes an In₂Ga₂ZnO₇ crystal.

31. The semiconductor device according to claim 20, wherein a concentration of hydrogen in the oxide semiconductor layer is 5×

10¹⁹ atoms/cm³ or less.