Abnormal clock rate detection in imaging sensor arrays

• US 9,207,708 B2
• Filed: 12/13/2013
• Issued: 12/08/2015
• Est. Priority Date: 04/23/2010
• Status: Active Grant

• Current Assignee: Teledyne FLIR LLC (Teledyne Technologies Incorporated)
• Original Assignee: FLIR Systems, Inc. (Teledyne Technologies Incorporated)
• Inventors: Simolon, Brian, Kurth, Eric A., Goodland, Jim, Nussmeier, Mark, Hgasten, Nicholas, Hoelter, Theodore R., Strandemar, Katrin, Boulanger, Pierre, Sharp, Barbara
• Primary Examiner(s): Connolly, Mark
• Application Number:
  US14/106,666
• Publication Number:
  US 20140108850A1
• Time in Patent Office: 725 Days
• US Class Current: 1/1
• CPC Class Codes: G01R 23/00 Arrangements for measuring frequencies; Arrangements for analysing frequency spectra
• CPC Class Codes: G06F 1/04 Generating or distributing clock signals or signals derived directly therefrom
• CPC Class Codes: G06F 1/14 Time supervision arrangements, e.g. real time clock
• CPC Class Codes: H04N 23/57 Mechanical or electrical details of cameras or camera modules specially adapted for being embedded in other devices
• CPC Class Codes: H04N 25/67 applied to fixed-pattern noise, e.g. non-uniformity of response
• CPC Class Codes: H04N 25/745 Circuitry for generating timing or clock signals
• CPC Class Codes: H04N 5/33 Transforming infrared radiation cameras or camera modules for generating image signals from infrared radiation H04N23/20; circuitry of SSIS for transforming infrared radiation into image signals H04N25/20

Abstract

Various techniques are provided to detect abnormal clock rates in devices such as imaging sensor devices (e.g., infrared and/or visible light imaging devices). In one example, a device may include a clock rate detection circuit that may be readily integrated as part of the device to provide effective detection of an abnormal clock rate. The device may include a ramp generator, a counter, and/or other components which may already be implemented as part of the device. The ramp generator may generate a ramp signal independent of a clock signal provided to the device, while the counter may increment or decrement a count value in response to the clock signal. The device may include a comparator adapted to select the current count value of the counter when the ramp signal reaches a reference signal. A processor of the device may be adapted to determine whether the clock signal is operating in an acceptable frequency range, based on the selected count value.

Claims

1. A device comprising:

a counter adapted to receive a clock signal and adjust a count value in response to the clock signal;

a ramp generator adapted to generate a ramp signal having a slope independent of the clock signal;

a comparator adapted to receive a reference signal and the ramp signal, and select the current count value in response to the reference signal and the ramp signal; and

a processor adapted to determine, based on the selected count value, if a frequency of the clock signal is within a specified range.

2. The device of claim 1, further comprising an imaging sensor array adapted to receive the clock signal, wherein the imaging sensor array is adapted to provide images at a frame rate dependent on the clock frequency.

3. The device of claim 2, wherein the imaging sensor array comprises a plurality of infrared sensors.

4. The device of claim 2, wherein the processor is adapted to disable the imaging sensor array if the clock frequency is outside the specified range.

5. The device of claim 1, further comprising a multiplexer adapted to generate a digital signal comprising the selected count value and pass the digital signal to the processor.

6. The device of claim 1, further comprising a temperature sensor adapted to detect a temperature associated with the device, wherein the processor is adapted to determine if the clock frequency is within the specified range based on whether the selected count value is within a predetermined range for the detected temperature.

7. The device of claim 6, wherein the selected count value is a first value of the counter captured at a first time, wherein the temperature sensor comprises:

a temperature sensitive element adapted to provide a temperature-dependent analog signal;

an analog-to-digital (A/D) converter adapted to convert the temperature-dependent analog signal to a second count value of the counter captured at a second time; and

wherein the processor is adapted to determine the detected temperature using the second current count value.

8. The device of claim 7, wherein a maximum of the predetermined range used by the processor decreases as the clock frequency increases.

9. The device of claim 1, further comprising a buffer adapted to adjust a voltage of the ramp signal passed from the ramp generator to the comparator.

10. The device of claim 1, further comprising a sample-and-hold circuit adapted to provide the reference signal to the comparator.

11. The device of claim 1, wherein the reference signal is a predetermined reference voltage.

12. The device of claim 11, wherein the comparator is adapted to select the current count value when the ramp signal exhibits a voltage substantially equal to the predetermined reference voltage.

13. A method comprising:

adjusting a count value in response to a clock signal;

generating a ramp signal having a slope independent of the clock signal;

selecting the current count value in response to the reference signal and the ramp signal; and

determining, based on the selected count value, if a frequency of the clock signal is within a specified range.

14. The method of claim 13, further comprising:

receiving, by an imaging sensor array, the clock signal; and

providing, by the imaging sensor array, images at a frame rate dependent on the clock frequency.

15. The method of claim 14, wherein the imaging sensor array comprises a plurality of infrared sensors.

16. The method of claim 14, further comprising disabling the imaging sensor array if the clock frequency is outside the specified range.

17. The method of claim 13, further comprising generating a digital signal comprising the selected count value, wherein the determining is performed using the digital signal.

18. The method of claim 13, further comprising detecting a temperature associated with the device, wherein the determining comprises determining if the clock frequency is within the specified range based on whether the selected count value is within a predetermined range for the detected temperature.

19. The method of claim 18, wherein the selected count value is a first value of the counter captured at a first time, the method further comprising:

providing a temperature-dependent analog signal;

converting the temperature-dependent analog signal to a second count value of the counter captured at a second time; and

determining the detected temperature using the second current count value.

20. The method of claim 19, further comprising decreasing the predetermined range as the clock frequency increases.

21. The method of claim 13, further comprising adjusting a voltage of the ramp signal between the generating and the selecting.

22. The method of claim 13, wherein the reference signal used during the comparing is provided by a sample-and-hold circuit.

23. The method of claim 13, wherein the reference signal is a predetermined reference voltage.

24. The method of claim 23, wherein the selecting comprises selecting the current count value when the ramp signal exhibits a voltage substantially equal to the predetermined reference voltage.