Transaction correlation system
First Claim
Patent Images
1. A method of automated debugging of a design verification environment, the method comprising:
- identifying a plurality of attributes of the design verification environment;
performing a plurality of simulation runs of the design verification environment;
recording a plurality of samples for each of the plurality of attributes from the plurality of simulation runs, wherein each sample includes a plurality of values of the plurality of attributes;
determining a subset of the simulation runs that fail;
determining a subset of simulation runs that pass;
identifying a subset of the plurality of attributes such that a distribution of values of the subset of attributes for the passing runs is different from a distribution of values of the subset of attributes for the failing runs;
generating a log of the plurality of simulation runs;
generating a tabular description based upon the log, wherein identifying the subset is based upon, at least in part, the tabular description;
utilizing a plurality of flattened tables as an input to a transaction correlation algorithm to determine one or more bugs in the design verification environment;
determining a measure for each passing run, wherein each measure for each passing run is based on a measure of the values sampled in the respective passing run;
determining a measure for each failing run, wherein each measure for each failing run is based on a measure of the values sampled in the respective failing run;
wherein the measure of the respective value sampled in the passing run is proportional to (A+C/D)/(B+1)−
(C−
C/D)/(D−
1) and the measure of the respective value sampled in the failing runs is proportional to (A+1)/(B+1)−
(C−
1)/(D−
1), wherein;
A=the number of failing runs with the respective value;
B=the number of failing runs;
C=the number of passing runs with the respective value; and
D=the number of passing runs.
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Accused Products
Abstract
Embodiments provide methods, systems, and devices involving transaction correlation tools that may record a limited number of run attributes yet are likely to be important in the debugging process. Some embodiments may include novel tabular representations of the runs. Embodiments may allow the user to specify directives for the recording of the runs and the creation of these tables. Embodiments may include comparing sets of failing and passing runs, which may be generated at random. This approach is called statistical debugging, as it employs statistical tools to find attributes of the DVE that tend to co-occur with the failure.
9 Citations
32 Claims
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1. A method of automated debugging of a design verification environment, the method comprising:
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identifying a plurality of attributes of the design verification environment; performing a plurality of simulation runs of the design verification environment; recording a plurality of samples for each of the plurality of attributes from the plurality of simulation runs, wherein each sample includes a plurality of values of the plurality of attributes; determining a subset of the simulation runs that fail; determining a subset of simulation runs that pass; identifying a subset of the plurality of attributes such that a distribution of values of the subset of attributes for the passing runs is different from a distribution of values of the subset of attributes for the failing runs; generating a log of the plurality of simulation runs; generating a tabular description based upon the log, wherein identifying the subset is based upon, at least in part, the tabular description; utilizing a plurality of flattened tables as an input to a transaction correlation algorithm to determine one or more bugs in the design verification environment; determining a measure for each passing run, wherein each measure for each passing run is based on a measure of the values sampled in the respective passing run; determining a measure for each failing run, wherein each measure for each failing run is based on a measure of the values sampled in the respective failing run;
wherein the measure of the respective value sampled in the passing run is proportional to (A+C/D)/(B+1)−
(C−
C/D)/(D−
1) and the measure of the respective value sampled in the failing runs is proportional to (A+1)/(B+1)−
(C−
1)/(D−
1), wherein;A=the number of failing runs with the respective value; B=the number of failing runs; C=the number of passing runs with the respective value; and D=the number of passing runs. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A system for automated debugging of a design verification environment, the system comprising:
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a storage medium; a processor coupled with the storage medium, the processor configured for automated debugging of the design verification environment of electronic design automation by a configuration to; identify a plurality of attributes of the design verification environment; perform a plurality of simulation runs of the design verification environment; record a plurality of samples for each of the plurality of attributes from the plurality of simulation runs, wherein each sample includes a plurality of values of the plurality of attributes; determine a subset of the simulation runs that fail; determine a subset of simulation runs that pass; identify a subset of the plurality of attributes such that a distribution of values of the subset of attributes for the passing runs is different from a distribution of values of the subset of attributes for the failing runs; generate a log of the plurality of simulation runs; generate a tabular description based upon the log, wherein identifying the subset is based upon, at least in part, the tabular description; and utilize a plurality of flattened tables as an input to a transaction correlation algorithm to determine one or more bugs in the design verification environment; determine a measure for each passing run, wherein each measure for each passing run is based on a measure of the values sampled in the respective passing run; determine a measure for each failing run, wherein each measure for each failing run is based on a measure of the values sampled in the respective failing run;
wherein the measure of the respective value sampled in the passing run is proportional to (A+C/D)/(B+1)−
(C−
C/D)/(D−
1) and the measure of the respective value sampled in the failing runs is proportional to (A+1)/(B+1)−
(C−
1)/(D−
1), wherein;A=the number of failing runs with the respective value; B=the number of failing runs; C=the number of passing runs with the respective value; and D=the number of passing runs. - View Dependent Claims (10, 11, 12, 13, 14, 15)
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16. A non-transitory machine-readable storage medium containing program instructions that, when executed by a controller within a computer, cause the controller to execute a method of automated debugging of a design verification environment, the method comprising:
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identifying a plurality of attributes of the design verification environment; performing a plurality of simulation runs of the design verification environment; recording a plurality of samples for each of the plurality of attributes from the plurality of simulation runs, wherein each sample includes a plurality of values of the plurality of attributes; determining a subset of the simulation runs that fail; determining a subset of simulation runs that pass; identifying a subset of the plurality of attributes such that a distribution of values of the subset of attributes for the passing runs is different from a distribution of values of the subset of attributes for the failing runs; generating a log of the plurality of simulation runs; generating a tabular description based upon the log, wherein identifying the subset is based upon, at least in part, the tabular description; and utilizing a plurality of flattened tables as an input to a transaction correlation algorithm to determine one or more bugs in the design verification environment; determining a measure for each passing run, wherein each measure for each passing run is based on a measure of the values sampled in the respective passing run; determining a measure for each failing run, wherein each measure for each failing run is based on a measure of the values sampled in the respective failing run;
wherein the measure of the respective value sampled in the passing run is proportional to (A+C/D)/(B+1)−
(C−
C/D)/(D−
1) and the measure of the respective value sampled in the failing runs is proportional to (A+1)/(B+1)−
(C−
1)/(D−
1), wherein;A=the number of failing runs with the respective value; B=the number of failing runs; C=the number of passing runs with the respective value; and D=the number of passing runs. - View Dependent Claims (17, 18, 19, 20, 21, 22)
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23. A method of automated debugging in a design verification environment, the method comprising:
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receiving a set of attributes of the design verification environment from a user; performing a plurality of simulation runs of the design verification environment; recording a plurality of samples for each of the plurality of user provided attributes from the plurality of simulation runs, wherein each sample includes a plurality of values of the plurality of attributes; creating a plurality of flattened tables based on the recorded plurality of samples for each simulation run, wherein the plurality of samples are provided in a log of recorded data, the log of recorded data used to generate the plurality of flattened tables; and utilizing the plurality of flattened tables as an input to a transaction correlation algorithm to determine one or more bugs in the design verification environment; determining a measure for each passing run, wherein each measure for each passing run is based on a measure of the values sampled in the respective passing run; determining a measure for each failing run, wherein each measure for each failing run is based on a measure of the values sampled in the respective failing run;
wherein the measure of the respective value sampled in the passing run is proportional to (A+C/D)/(B+1)−
(C−
C/D)/(D−
1) and the measure of the respective value sampled in the failing runs is proportional to (A+1)/(B+1)−
(C−
1)/(D−
1), wherein;A=the number of failing runs with the respective value; B=the number of failing runs; C=the number of passing runs with the respective value; and D=the number of passing runs. - View Dependent Claims (24, 25, 26, 27)
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28. A non-transitory machine-readable storage medium containing program instructions that, when executed by a controller within a computer, cause the controller to execute a method of automated debugging of a design verification environment, the method comprising:
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receiving a set of attributes of the design verification environment from a user; performing a plurality of simulation runs of the design verification environment; recording a plurality of samples for each of the plurality of user provided attributes from the plurality of simulation runs, wherein each sample includes a plurality of values of the plurality of attributes; creating a plurality of flattened tables based on the recorded plurality of samples for each simulation run, wherein the plurality of samples are provided in a log of recorded data, the log of recorded data used to generate the plurality of flattened tables; and utilizing the plurality of flattened tables as an input to a transaction correlation algorithm to determine one or more bugs in the design verification environment; determining a measure for each passing run, wherein each measure for each passing run is based on a measure of the values sampled in the respective passing run; determining a measure for each failing run, wherein each measure for each failing run is based on a measure of the values sampled in the respective failing run;
wherein the measure of the respective value sampled in the passing run is proportional to (A+C/D)/(B+1)−
(C−
C/D)/(D−
1) and the measure of the respective value sampled in the failing runs is proportional to (A+1)/(B+1)−
(C−
1)/(D−
1), wherein;A=the number of failing runs with the respective value; B=the number of failing runs; C=the number of passing runs with the respective value; and D=the number of passing runs. - View Dependent Claims (29, 30, 31, 32)
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Specification