Variable frequency charge pump

• US 9,264,053 B2
• Filed: 07/01/2013
• Issued: 02/16/2016
• Est. Priority Date: 01/18/2011
• Status: Active Grant

• Current Assignee: pSemi Corporation (Murata Manufacturing Co Limited)
• Original Assignee: Peregrine Semiconductor Corporation (Murata Manufacturing Co Limited)
• Inventors: Englekirk, Robert Mark
• Primary Examiner(s): Hiltunen, Thomas J
• Application Number:
  US13/933,006
• Publication Number:
  US 20150002195A1
• Time in Patent Office: 960 Days
• Field of Search: 326/536
• US Class Current: 1/1
• CPC Class Codes: H02M 1/0032 Control circuits allowing low power mode operation, e.g. in standby mode
• CPC Class Codes: H02M 1/0045 Converters combining the concepts of switch-mode regulation and linear regulation, e.g. linear pre-regulator to switching converter, linear and switching converter in parallel, same converter or same transistor operating either in linear or switching mode
• CPC Class Codes: H02M 3/07 using capacitors charged and discharged alternately by semiconductor devices with control electrode , e.g. charge pumps
• CPC Class Codes: H02M 3/071 adapted to generate a negative voltage output from a positive voltage source
• CPC Class Codes: H02M 3/073 Charge pumps of the Schenkel-type
• CPC Class Codes: H03L 7/0891 the up-down pulses controlling source and sink current generators, e.g. a charge pump
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A charge pump circuit that utilizes a sensing circuit for determining the current loading or status of the output supply generated by the charge pump circuit to determine a corresponding frequency for a variable rate clock for the charge pump circuit. When a current load is present, the clock frequency automatically ramps up to a relatively high level to increase the output current of the charge pump circuit. When the current load is removed and the supply is settled out, the clock frequency is automatically reduced to a relatively quieter level and the charge pump circuitry operates at a lower power level. Accordingly, the charge pump circuit is only noisy when it has to be, thus providing optimal power when required and being electrically quiet and operating at lower power at all other times.

Claims

1. A variable frequency charge pump circuit generating reduced electrical noise at low loads, including:

(a) a charge pump having a clock signal input, a voltage supply input, and an output, for providing a pumped output voltage at the output based on a regulated input voltage applied at the voltage supply input, with a current available to a load coupled to the output being a function of the frequency of a signal applied to the clock signal input;

(b) a feedback circuit coupled to the charge pump output for providing a feedback signal indicative of the pumped output voltage at such output;

(c) a voltage regulator coupled to a voltage source, the charge pump voltage supply input, and the feedback circuit, for providing the regulated input voltage to the charge pump voltage supply input in response to the feedback signal, thereby regulating the pumped output voltage at the charge pump output, the voltage regulator including;

(1) a controllable conductivity device coupled to the voltage source and to the charge pump voltage supply input, and having a control input for controlling the conductivity of the controllable conductivity device; and

(2) an amplifier having an output coupled to the control input of the controllable conductivity device, a first input coupled to a reference voltage, and a second input coupled to the feedback circuit, for generating a control signal at the amplifier output that varies as a function of a difference between the feedback signal and the reference voltage, the control signal controlling the conductivity of the controllable conductivity device and thus the input voltage applied to the charge pump voltage supply input;

(d) a clock source having a voltage input coupled to the voltage source, a control input configured to receive a bias signal generated from the feedback signal, and a clock signal output coupled to the charge pump clock signal input, for generating a clock signal at the clock signal output coupled to the charge pump clock signal input, the clock signal having a frequency that is a function of the feedback signal through the bias signal, thereby controlling the amount of current available to the load coupled to the charge pump output as function of the frequency of the clock signal, whereby as the load increases, the frequency of the clock signal increases and the current available from the charge pump increases, and as the load decreases, the frequency of the clock signal decreases and the current available from the charge pump decreases with a resulting decrease in electrical noise generated by the charge pump.

2. The variable frequency charge pump circuit of claim 1, further including a bias signal generator, coupled to the output of the amplifier and to the control input of the clock source, for providing the bias signal to the clock source as a function of the feedback signal.

3. The variable frequency charge pump circuit of claim 1, wherein the controllable conductivity device is a field effect transistor.

4. The variable frequency charge pump circuit of claim 1, further including a noise source coupled to the clock source for varying the frequency of the clock signal from the clock source in order to spread generated spur signals.

5. A variable frequency charge pump generating reduced electrical noise at low loads, including:

(a) charge pump means for providing a pumped output voltage at an output based on a regulated input voltage applied at a voltage supply input, with a current available to a load coupled to the output being a function of the frequency of a signal applied to a clock signal;

(b) feedback circuit means coupled to the output of the charge pump means, for providing a feedback signal indicative of the pumped output voltage at such output;

(c) voltage regulator means coupled to a voltage source, the voltage supply input of the charge pump means, and the feedback circuit means, for providing the regulated input voltage to the voltage supply input of the charge pump means in response to the feedback signal, thereby regulating the pumped output voltage at the output of the charge pump means, the voltage regulator means including;

(1) a controllable conductivity device coupled to the voltage source and to the voltage supply input of the charge pump means, and having a control input for controlling the conductivity of the controllable conductivity device; and

(2) an amplifier having an output coupled to the control input of the controllable conductivity device, a first input coupled to a reference voltage, and a second input coupled to the feedback circuit means, for generating a control signal at the amplifier output that varies as a function of a difference between the feedback signal and the reference voltage, the control signal controlling the conductivity of the controllable conductivity device and thus the input voltage applied to the voltage supply input of the charge pump means;

(d) clock source means having a voltage input coupled to the voltage source, a control input configured to receive a bias signal generated from the feedback signal, and a clock signal output coupled to the clock signal input of the charge pump means, for generating a clock signal at the clock signal output coupled to the clock signal input of the charge pump means, the clock signal having a frequency that is a function of the feedback signal through the bias signal, thereby controlling the amount of current available to the load coupled to the output of the charge pump means as a function of the frequency of the clock signal, whereby as the load increases, the frequency of the clock signal increases and the current available from the charge pump means increases, and as the load decreases, the frequency of the clock signal decreases and the current available from the charge pump means decreases with a resulting decrease in electrical noise generated by the charge pump means.

6. The variable frequency charge pump of claim 5, further including a bias signal generator means, coupled to the output of the amplifier and to the control input of the clock source means, for providing the bias signal to the clock source means as a function of the feedback signal.

7. The variable frequency charge pump circuit of claim 5, wherein the controllable conductivity device is a field effect transistor.

8. The variable frequency charge pump circuit of claim 5, further including a noise source means coupled to the clock source means for varying the frequency of the clock signal from the clock source means in order to spread generated spur signals.

9. A method for controlling a charge pump circuit so as to reduce electrical noise at low loads, including the steps of:

(a) providing a pumped output voltage at an output of a charge pump based on a regulated input voltage applied at a voltage supply input to the charge pump, with a current available to a load coupled to the output being a function of the frequency of a signal applied to a clock signal input to the charge pump;

(b) generating a feedback signal indicative of the pumped output voltage at the output of the charge pump;

(c) providing the regulated input voltage to the voltage supply input of the pump charge in response to the feedback signal, thereby regulating the pumped output voltage at the output of the pump charge, including;

(1) coupling a controllable conductivity device to a voltage source and to the voltage supply input of the pump charge, the controllable conductivity device having a control input for controlling the conductivity of the controllable conductivity device; and

(2) coupling an output of an amplifier to the control input of the controllable conductivity device, coupling a first input of the amplifier to a reference voltage, and coupling a second input of the amplifier to the feedback signal; and

(3) generating a control signal at the amplifier output that varies as a function of a difference between the feedback signal and the reference voltage, the control signal controlling the conductivity of the controllable conductivity device and thus the input voltage applied to the voltage supply input of the pump charge;

(d) generating a clock signal from a clock source means having a voltage input coupled to the voltage source, a control input configured to receive a bias signal generated from the feedback signal, and a clock signal output coupled to the clock signal input of the charge pump, the clock signal having a frequency that is a function of the feedback signal through the bias signal, thereby controlling the amount of current available to the load coupled to the output of the charge pump as a function of the frequency of the clock signal, whereby as the load increases, the frequency of the clock signal increases and the current available from the charge pump increases, and as the load decreases, the frequency of the clock signal decreases and the current available from the charge pump decreases with a resulting decrease in electrical noise generated by the charge pump.

10. The method of claim 9, further including the step of randomly varying the frequency of the clock signal in order to spread generated spur signals.

11. A variable frequency charge pump circuit generating reduced electrical noise at low loads, including:

(a) a charge pump having a clock signal input, a voltage input, and an output, for providing a pumped output voltage at the output based on an input voltage applied at the voltage input, with a current available to a load coupled to the output being a function of the frequency of a signal applied to the clock signal input;

(b) a feedback circuit coupled to the charge pump output for providing a feedback signal indicative of the pumped output voltage at such output;

(c) a voltage regulator coupled to a voltage source, the charge pump voltage input, and the feedback circuit, for regulating the input voltage applied to the charge pump voltage input in response to the feedback signal, thereby regulating the pumped output voltage at the charge pump output, the voltage regulator including;

(1) a controllable conductivity device coupled to the voltage source and to the charge pump voltage input, and having a control input for controlling the conductivity of the controllable conductivity device; and

(2) an amplifier having an output coupled to the control input of the controllable conductivity device, a first input coupled to a reference voltage, and a second input coupled to the feedback circuit, for generating a control signal at the amplifier output that varies as a function of a difference between the feedback signal and the reference voltage, the control signal controlling the conductivity of the controllable conductivity device and thus the input voltage applied to the charge pump voltage input;

(d) a clock source having a voltage input coupled to the voltage source, a control input configured to receive a bias signal generated from the feedback signal, and a clock signal output coupled to the charge pump clock signal input, for generating a clock signal at the clock signal output coupled to the charge pump clock signal input, the clock signal having a frequency that is a function of the feedback signal through the bias signal, thereby controlling the amount of current available to the load coupled to the charge pump output as function of the frequency of the clock signal, whereby as the load increases, the frequency of the clock signal increases and the current available from the charge pump increases, and as the load decreases, the frequency of the clock signal decreases and the current available from the charge pump decreases with a resulting decrease in electrical noise generated by the charge pump; and

(e) a bias signal generator, coupled to the output of the amplifier and to the control input of the clock source, for providing the bias signal to the clock source as a function of the feedback signal.

12. The variable frequency charge pump circuit of claim 11, wherein the controllable conductivity device is a field effect transistor.

13. The variable frequency charge pump circuit of claim 11, further including a noise source coupled to the clock source for varying the frequency of the clock signal from the clock source in order to spread generated spur signals.

14. A variable frequency charge pump generating reduced electrical noise at low loads, including:

(a) charge pump means for providing a pumped output voltage at an output based on an input voltage applied at a voltage input, with a current available to a load coupled to the output being a function of the frequency of a signal applied to a clock signal;

(b) feedback circuit means coupled to the output of the charge pump means, for providing a feedback signal indicative of the pumped output voltage at such output;

(c) voltage regulator means coupled to a voltage source, the voltage input of the charge pump means, and the feedback circuit means, for regulating the input voltage applied to the voltage input of the charge pump means in response to the feedback signal, thereby regulating the pumped output voltage at the output of the charge pump means, the voltage regulator means including;

(1) a controllable conductivity device coupled to the voltage source and to the voltage input of the charge pump means, and having a control input for controlling the conductivity of the controllable conductivity device; and

(2) an amplifier having an output coupled to the control input of the controllable conductivity device, a first input coupled to a reference voltage, and a second input coupled to the feedback circuit means, for generating a control signal at the amplifier output that varies as a function of a difference between the feedback signal and the reference voltage, the control signal controlling the conductivity of the controllable conductivity device and thus the input voltage applied to the voltage input of the charge pump means;

(d) clock source means having a voltage input coupled to the voltage source, a control input configured to receive a bias signal generated from the feedback signal, and a clock signal output coupled to the clock signal input of the charge pump means, for generating a clock signal at the clock signal output coupled to the clock signal input of the charge pump means, the clock signal having a frequency that is a function of the feedback signal through the bias signal, thereby controlling the amount of current available to the load coupled to the output of the charge pump means as a function of the frequency of the clock signal, whereby as the load increases, the frequency of the clock signal increases and the current available from the charge pump means increases, and as the load decreases, the frequency of the clock signal decreases and the current available from the charge pump means decreases with a resulting decrease in electrical noise generated by the charge pump means; and

(e) a bias signal generator, coupled to the output of the amplifier and to the control input of the clock source, for providing the bias signal to the clock source as a function of the feedback signal.

15. The variable frequency charge pump circuit of claim 14, wherein the controllable conductivity device is a field effect transistor.

16. The variable frequency charge pump circuit of claim 14, further including a noise source means coupled to the clock source means for varying the frequency of the clock signal from the clock source means in order to spread generated spur signals.

17. A method for controlling a charge pump circuit so as to reduce electrical noise at low loads, including the steps of:

(a) providing a pumped output voltage at an output of a charge pump based on an input voltage applied at a voltage input to the charge pump, with a current available to a load coupled to the output being a function of the frequency of a signal applied to a clock signal input to the charge pump;

(b) generating a feedback signal indicative of the pumped output voltage at the output of the charge pump;

(c) regulating the input voltage applied to the voltage input of the pump charge in response to the feedback signal, thereby regulating the pumped output voltage at the output of the pump charge, including;

(1) coupling a controllable conductivity device to a voltage source and to the voltage input of the pump charge, the controllable conductivity device having a control input for controlling the conductivity of the controllable conductivity device; and

(2) coupling an output of an amplifier to the control input of the controllable conductivity device, coupling a first input of the amplifier to a reference voltage, and coupling a second input of the amplifier to the feedback signal; and

(3) generating a control signal at the amplifier output that varies as a function of a difference between the feedback signal and the reference voltage, the control signal controlling the conductivity of the controllable conductivity device and thus the input voltage applied to the voltage input of the pump charge;

(d) generating a clock signal from a clock source means having a voltage input coupled to the voltage source, a control input configured to receive a bias signal generated from the feedback signal, and a clock signal output coupled to the clock signal input of the charge pump, the clock signal having a frequency that is a function of the feedback signal through the bias signal, thereby controlling the amount of current available to the load coupled to the output of the charge pump as a function of the frequency of the clock signal, whereby as the load increases, the frequency of the clock signal increases and the current available from the charge pump increases, and as the load decreases, the frequency of the clock signal decreases and the current available from the charge pump decreases with a resulting decrease in electrical noise generated by the charge pump; and

(e) generating a bias signal and coupling the generated bias signal to the output of the amplifier and to the control input of the clock source, thereby providing the bias signal to the clock source as a function of the feedback signal.

18. The method of claim 17, further including the step of randomly varying the frequency of the clock signal in order to spread generated spur signals.