Display device

• US 9,293,601 B2
• Filed: 06/08/2015
• Issued: 03/22/2016
• Est. Priority Date: 07/31/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Ohara, Hiroki, Sasaki, Toshinari, Noda, Kosei, Kuwabara, Hideaki
• Primary Examiner(s): YUSHIN, NIKOLAY K
• Application Number:
  US14/732,874
• Publication Number:
  US 20150303310A1
• Time in Patent Office: 288 Days
• US Class Current: 1/1
• CPC Class Codes: G02F 1/133345 Insulating layers G02F1/1335, G02F1/1337, G02F1/135, G02F1/136 take precedence
• CPC Class Codes: G02F 1/1337 Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
• CPC Class Codes: G02F 1/134309 characterised by their geometrical arrangement
• CPC Class Codes: G02F 1/136227 Through-hole connection of the pixel electrode to the active element through an insulation layer
• CPC Class Codes: G02F 1/136277 formed on a semiconductor substrate, e.g. of silicon
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/517 the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate H01L29/518 takes precedence
• CPC Class Codes: H01L 29/78609 for preventing leakage current H01L29/78618 takes precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

An object is to provide a semiconductor device having a structure with which parasitic capacitance between wirings can be sufficiently reduced. An oxide insulating layer serving as a channel protective layer is formed over part of an oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the oxide insulating layer, an oxide insulating layer covering a peripheral portion of the oxide semiconductor layer is formed. The oxide insulating layer which covers the peripheral portion of the oxide semiconductor layer is provided to increase the distance between the gate electrode layer and a wiring layer formed above or in the periphery of the gate electrode layer, whereby parasitic capacitance is reduced.

Claims

1. A display device comprising a plurality of pixels, each of the plurality of pixels comprising:

a first conductive layer over a first substrate;

a second conductive layer over the first substrate;

a first insulating layer over the first conductive layer;

a semiconductor layer over the first insulating layer, the semiconductor layer overlapping with the first conductive layer with the first insulating layer therebetween;

a second insulating layer over the semiconductor layer, the second insulating layer including a first contact hole and a second contact hole, wherein the second insulating layer covers a periphery of the semiconductor layer;

a third conductive layer over the second insulating layer, the third conductive layer electrically connected to the semiconductor layer through the first contact hole;

a fourth conductive layer over the second insulating layer, the fourth conductive layer electrically connected to the semiconductor layer through the second contact hole;

a third insulating layer over the third conductive layer and the fourth conductive layer, the third insulating layer over a third contact hole;

a pixel electrode over the third insulating layer, the pixel electrode electrically connected to one of the third conductive layer and the fourth conductive layer through the third contact hole;

a first alignment film over the pixel electrode;

a liquid crystal layer over the first alignment film;

the liquid crystal layer including a liquid crystal;

a second alignment film over the liquid crystal layer; and

a second substrate over the second alignment film,

wherein the pixel electrode overlaps with the second conductive layer with the third insulating layer therebetween,

wherein an electric field is generated between the second conductive layer and the pixel electrode;

wherein an alignment of the liquid crystal is controlled with the electric field,

wherein the first conductive layer is a part of a first wiring,

wherein the other of the third conductive layer and the fourth conductive layer is a part of a second wiring,

wherein the first insulating layer and the second insulating layer are provided between the first wiring and the second wiring, and

wherein an entirety of the semiconductor layer overlaps with the first conductive layer.

2. The display device according to claim 1, wherein the second conductive layer is in contact with the first substrate.

3. The display device according to claim 1, wherein the pixel electrode further overlaps with the second conductive layer with the first insulating layer and the second insulating layer therebetween.

4. The display device according to claim 1, further comprising:

a fifth conductive layer in contact with the first substrate;

wherein the fifth conductive layer is in contact with the second conductive layer.

5. The display device according to claim 1,

wherein a region over laps with a channel formation region in the semiconductor layer, and

wherein the third insulating layer is in contact with the second insulating layer in the region.

6. A display device comprising a plurality of pixels, each of the plurality of pixels comprising:

a first conductive layer over a first substrate;

a second conductive layer over the first substrate;

a first insulating layer over the first conductive layer;

an oxide semiconductor layer over the first insulating layer, the oxide semiconductor layer overlapping with the first conductive layer with the first insulating layer therebetween;

a second insulating layer over the oxide semiconductor layer, the second insulating layer including a first contact hole and a second contact hole, wherein the second insulating layer covers a periphery of the oxide semiconductor layer;

a third conductive layer over the second insulating layer, the third conductive layer electrically connected to the oxide semiconductor layer through the first contact hole;

a fourth conductive layer over the second insulating layer, the fourth conductive layer electrically connected to the oxide semiconductor layer through the second contact hole;

a third insulating layer over the third conductive layer and the fourth conductive layer, the third insulating layer over a third contact hole;

a pixel electrode over the third insulating layer, the pixel electrode electrically connected to one of the third conductive layer and the fourth conductive layer through the third contact hole;

a first alignment film over the pixel electrode;

a liquid crystal layer over the first alignment film;

the liquid crystal layer including a liquid crystal;

a second alignment film over the liquid crystal layer; and

a second substrate over the second alignment film,

wherein the pixel electrode overlaps with the second conductive layer with the third insulating layer therebetween,

wherein an electric field is generated between the second conductive layer and the pixel electrode;

wherein an alignment of the liquid crystal is controlled with the electric field,

wherein the first conductive layer is a part of a first wiring,

wherein the other of the third conductive layer and the fourth conductive layer is a part of a second wiring,

wherein the first insulating layer and the second insulating layer are provided between the first wiring and the second wiring, and

wherein an entirety of the oxide semiconductor layer overlaps with the first conductive layer.

7. The display device according to claim 6, wherein the oxide semiconductor layer comprises indium, gallium, and zinc.

8. The display device according to claim 6, wherein the second conductive layer is in contact with the first substrate.

9. The display device according to claim 6, wherein the pixel electrode further overlaps with the second conductive layer with the first insulating layer and the second insulating layer therebetween.

10. The display device according to claim 6, further comprising:

a fifth conductive layer in contact with the first substrate;

wherein the fifth conductive layer is in contact with the second conductive layer.

11. The display device according to claim 6,

wherein a region over laps with a channel formation region in the oxide semiconductor layer, and

wherein the third insulating layer is in contact with the second insulating layer in the region.