Low duty cycle network controller

• US 9,320,002 B2
• Filed: 11/06/2013
• Issued: 04/19/2016
• Est. Priority Date: 06/21/2006
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Lee, Chong Uk, Holcman, Alejandro Raul, Stein, Jeremy M., Rezaiifar, Ramin, Aryan, Babak
• Primary Examiner(s): Nguyen, Brian D
• Application Number:
  US14/073,263
• Publication Number:
  US 20140071859A1
• Time in Patent Office: 895 Days
• Field of Search: 370/277, 370/311, 370/350
• US Class Current: 1/1
• CPC Class Codes: H04B 7/24 for communication between two or more posts wireless communication networks H04W
• CPC Class Codes: H04J 3/06 Synchronising arrangements for television systems H04N5/04; bit-synchronisation H04L7/00
• CPC Class Codes: H04W 52/028 switching on or off only a part of the equipment circuit blocks
• CPC Class Codes: H04W 56/0015 one node acting as a reference for the others
• CPC Class Codes: Y02D 30/70 in wireless communication networks

Abstract

Operating at least one low duty cycle (LDC) controller to maintain synchronization between the LDC controller and a plurality of LDC terminals operating over a communication network using only overhead channels of the network and conforming to the protocol and timing of said network, wherein synchronization between the LDC controller and the plurality of LDC terminals is maintained separately from the protocol and timing of the communication network, and enables the LDC controller to schedule power down and wake up of the plurality of LDC terminals for durations longer than allowable under the protocol and timing of the communication network.

Claims

1. A Low Duty Cycle (LDC) controller for use in a communications network, comprising:

a processor programmed to;

formulate synchronization information to maintain synchronization between the LDC controller and a plurality of terminals in the communications network, wherein the synchronization information is maintained separately and does not rely on protocols and timing associated with the communications network; and

,

a transmitter configured to transmit the synchronization information on a half-duplex forward link channel of the communications network to at least one of the plurality of terminals.

2. The LDC controller of claim 1, wherein the synchronization information includes a power down time period that is longer in duration than allowable under the protocol and timing of the communications network.

3. The LDC controller of claim 1, wherein the synchronization information includes a wake up time period that is longer in duration than allowable under the protocol and timing of the communications network.

4. The LDC controller of claim 1, wherein the synchronization information includes a time period and the processor is programmed to hash a plurality of wake up times over the time period.

5. The LDC controller of claim 1, comprising a receiver configured to receive terminal message information on a half-duplex reverse link channel.

6. The LDC controller of claim 5, wherein the synchronization information includes a power down time and the processor is programmed to formulate the power down time based on the received terminal message information.

7. A system for synchronizing a plurality of terminals in a communications network, comprising:

means for formulating synchronization information to maintain synchronization between a Low Duty Cycle (LDC) controller and the plurality of terminals in the communications network;

means for maintaining the synchronization information separately and without relying on protocols and timing associated with the communications network; and

means for transmitting the synchronization information on a half-duplex forward link channel of the communications network to at least one of the plurality of terminals.

8. The system of claim 7, wherein the synchronization information includes a power down time period that is longer in duration than allowable under the protocol and timing of the communications network.

9. The system of claim 7, wherein the synchronization information includes a wake up time period that is longer in duration than allowable under the protocol and timing of the communications network.

10. The system of claim 7, wherein the synchronization information includes a time period and the processor is programmed to hash a plurality of wake up times over the time period.

11. The system of claim 7, comprising means for receiving terminal message information on a half-duplex reverse link channel.

12. The system of claim 11, wherein the synchronization information includes a power down time and the means for formulating the power down time based on the received terminal message information.

13. A non-transitory computer-readable medium having computer-executable instructions for performing a method comprising:

formulating synchronization information to maintain synchronization between a Low Duty Cycle (LDC) controller and a plurality of terminals in a communications network, wherein the synchronization information is maintained separately and does not rely on protocols and timing associated with the communications network; and

,

transmitting the synchronization information on a half-duplex forward link channel to at least one of the plurality of terminals of the communications network.

14. The computer-readable medium of claim 13, wherein the synchronization information includes a power down time period that is longer in duration than allowable under the protocol and timing of the communications network.

15. The computer-readable medium of claim 13, wherein the synchronization information includes a wake up time period that is longer in duration than allowable under the protocol and timing of the communications network.

16. The computer-readable medium of claim 13, wherein the synchronization information includes a time period and the computer-executable instructions include hashing a plurality of wake up times over the time period.

17. The computer-readable medium of claim 13, comprising computer-executable instructions for receiving a terminal message information on a half-duplex reverse link channel.

18. The computer-readable medium of claim 17, wherein the synchronization information includes a power down time and including computer-executable instructions for formulating the power down time based on the terminal message information.

19. A method of sending synchronization information, comprising:

formulating synchronization information to maintain synchronization between a Low Duty Cycle (LDC) controller and a plurality of terminals in a communications network, wherein the synchronization information is maintained separately and does not rely on protocols and timing associated with the communications network; and

,

transmitting the synchronization information on a half-duplex forward link channel of the communications network to at least one of the plurality of terminals.

20. The method of claim 19, wherein the synchronization information includes a power down time period that is longer in duration than allowable under the protocol and timing of the communications network.

21. The method of claim 19, wherein the synchronization information includes a wake up time period that is longer in duration than allowable under the protocol and timing of the communications network.

22. The method of claim 19, wherein the synchronization information includes a time period and the method comprises hashing a plurality of wake up times over the time period.

23. The method of claim 19, comprising receiving a terminal message information on a half-duplex reverse link channel.

24. The method of claim 23, wherein the synchronization information includes a power down time and the method comprises formulating the power down time based on the terminal message information.