Family of slew-enhanced operational transconductance amplifiers

• US 9,356,562 B2
• Filed: 01/30/2014
• Issued: 05/31/2016
• Est. Priority Date: 01/30/2014
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Motamed, A
• Primary Examiner(s): Nguyen, Patricia T
• Application Number:
  US14/168,647
• Publication Number:
  US 20150214897A1
• Time in Patent Office: 852 Days
• Field of Search: 330/255, 330/257, 330/310
• US Class Current: 1/1
• CPC Class Codes: H03F 1/223 with MOSFET's
• CPC Class Codes: H03F 2200/234 the input amplifying stage being one or more operational amplifiers
• CPC Class Codes: H03F 2200/411 the output amplifying stage of an amplifier comprising two power stages
• CPC Class Codes: H03F 2203/45002 the addition of two signals being made by addition of two currents by coupling the outputs of two current mirrors in parallel
• CPC Class Codes: H03F 2203/45024 the differential amplifier amplifying transistors are cascode coupled transistors
• CPC Class Codes: H03F 2203/45248 the dif amp being designed for improving the slew rate
• CPC Class Codes: H03F 2203/45536 the FBC comprising a switch and being coupled between the LC and the IC
• CPC Class Codes: H03F 2203/45544 the IC comprising one or more capacitors, e.g. coupling capacitors
• CPC Class Codes: H03F 2203/45618 the IC comprising only one switch
• CPC Class Codes: H03F 2203/45674 the LC comprising one current mirror
• CPC Class Codes: H03F 2203/45676 the LC comprising one cascode current mirror
• CPC Class Codes: H03F 2203/45702 the LC comprising two resistors
• CPC Class Codes: H03F 3/45188 Non-folded cascode stages
• CPC Class Codes: H03F 3/45192 Folded cascode stages

Abstract

Operational transconductance amplifiers (OTAs) with enhanced slew rate are disclosed. An OTA can have a main amplifier and pre-amplifier gain stage to increase the effective transconductance and bandwidth of the OTA. The pre-amplifier and main amplifier can be coupled to enhance slew current without adding additional bias current to the main amplifier input stages. Pre-amplifier bias current can be recycled and redirected to the load. OTAs with enhanced slew rate can be particularly useful in applications requiring high-frequency switching of voltage levels to drive high capacitance lines. For example, an integrated touch sensor panel and display can be operated by alternatively applying a first voltage level to an electrode in a display mode and a second voltage level during a touch sensing mode using OTA sense or charge amplifiers with enhanced slew rate. Enhanced slew rate can increase the time available to demodulate a touch signal for improved system performance.

Claims

1. An operational transconductance amplifier with enhanced slew rate, the amplifier comprising:

a pre-amplifier circuit; and

a main amplifier circuit, the main amplifier circuit comprising an input stage and an output stage;

wherein an amplified signal output of the pre-amplifier circuit is coupled to a signal input of the input stage of the main amplifier circuit;

wherein at least one of the pre-amplifier circuit and the main amplifier circuit is configured to accept a differential input;

wherein the pre-amplifier circuit is electrically coupled to the output stage of the main amplifier circuit by at least a first pair and a second pair of transistors configured to transfer current from the pre-amplifier circuit to the output stage of the main amplifier circuit; and

wherein the input stage of the main amplifier circuit is electrically coupled to the output stage of the main amplifier circuit by at least a third pair and a fourth pair of transistors.

2. The amplifier of claim 1, wherein the first and second pairs of transistors are configurable to operate as a pair of current mirrors.

3. The amplifier of claim 1, wherein the third and fourth pairs of transistors are configurable to operate as a pair of current mirrors.

6. The amplifier of claim 1, wherein at least one of the pre-amplifier circuit and the main amplifier circuit is implemented using a cascode structure.

7. The amplifier of claim 1, the amplifier further comprising a plurality of transistors, wherein at least one of the plurality of transistors is a metal oxide semiconductor field effect transistor.

8. The amplifier of claim 7, wherein at least one of the plurality of transistors is a bipolar junction transistor.

4. An operational transconductance amplifier with enhanced slew rate, the amplifier comprising:

a pre-amplifier circuit; and

a main amplifier circuit, the main amplifier circuit comprising an input stage and an output stage;

wherein an amplified signal output of the pre-amplifier circuit is coupled to a signal input of the input stage of the main amplifier circuit;

wherein at least one of the pre-amplifier circuit and the main amplifier circuit is configured to accept a differential input;

wherein the pre-amplifier circuit is electrically coupled to an output stage of the main amplifier circuit by at least a first pair and a second pair of transistors configured to transfer current from the pre-amplifier circuit to the output stage of the main amplifier circuit; and

wherein the pre-amplifier circuit and the input stage of the main amplifier circuit are electrically coupled to the output stage of the main amplifier circuit by the first and second pairs of transistors.

5. The amplifier of claim 4 wherein the pre-amplifier circuit comprises a differential common-source amplifier using a resistive load and the pre-amplifier circuit is electrically coupled to the input stage of the main amplifier circuit via the resistive load.

20. The amplifier of claim 4, wherein at least one of the pre-amplifier circuit and the main amplifier circuit is implemented using a cascode structure.

21. The amplifier of claim 4, the amplifier further comprising a plurality of transistors, wherein at least one of the plurality of transistors is a metal oxide semiconductor field effect transistor.

22. The amplifier of claim 21, wherein at least one of the plurality of transistors is a bipolar junction transistor.

9. A method for enhancing slew rate of an operational transconductance amplifier, the method comprising:

forming a main amplifier circuit, the main amplifier circuit comprising an input stage and an output stage;

forming a pre-amplifier circuit electrically coupled to the main amplifier circuit, wherein an amplified signal output of the pre-amplifier circuit is coupled to a signal input of the input stage of the main amplifier circuit, wherein at least one of the pre-amplifier circuit and the main amplifier circuit is configured to accept a differential input; and

transferring current from a pre-amplifier circuit to the output stage of a main amplifier circuit by at least a first pair and a second pair of transistors.

10. The method of claim 9, further comprising coupling the pre-amplifier circuit to the main amplifier circuit output stage using current mirrors.

11. The method of claim 10, further comprising coupling the input stage of the main amplifier circuit to the output stage of the main amplifier circuit using current mirrors.

12. The method of claim 11, further comprising coupling the pre-amplifier circuit and the input stage of the main amplifier circuit to the output stage of the main amplifier circuit using shared current mirrors.

13. The method of claim 12, further comprising coupling the pre-amplifier circuit to the input stage of the main amplifier circuit via a resistive load.

14. An operational transconductance amplifier with enhanced slew rate, the amplifier comprising:

a pre-amplifier circuit configurable as a differential common-source amplifier; and

a main amplifier circuit comprising a differential input stage and an output stage;

wherein a differential output voltage of the pre-amplifier circuit is electrically coupled to the differential input stage of the main amplifier circuit and the pre-amplifier circuit is further electrically coupled by at least a first pair and a second pair of transistors to the output stage of the main amplifier circuit, the first pair and the second pair of transistors configured to transfer current from the pre-amplifier circuit to the output stage of the main amplifier circuit.

15. The amplifier of claim 14, wherein at least one of the pre-amplifier circuit or the main amplifier circuit is implemented using a cascode structure.

16. The amplifier of claim 14, wherein the first and second pairs of transistors are configurable to operate as a pair of current mirrors.

17. The amplifier of claim 16, wherein the differential input stage of the main amplifier circuit is electrically coupled to the output stage of the main amplifier circuit by at least third and a fourth pair of transistors, the third and fourth pairs configurable to operate as a pair of current mirrors.

18. The amplifier of claim 16, wherein the pre-amplifier circuit and the differential input stage of the main amplifier circuit are electrically coupled to the output stage of the main amplifier circuit by the first and second pairs of transistors.

19. The amplifier of claim 18 wherein the differential common-source amplifier of the pre-amplifier circuit further comprises a resistive load and the pre-amplifier circuit is electrically coupled to the differential input stage of the main amplifier circuit via the resistive load.