Low power multi-core decoder system and method
First Claim
Patent Images
1. A portable data terminal, comprising:
- at least one imaging assembly generating pixel data from a target;
a frame buffer receiving said pixel data from said imaging assembly;
a data storage means storing a plurality of program instructions implementing at least one one-dimensional decoder and at least one two-dimensional decoder,a processor in communication with said data storage means and executing said program instructions such that said decoders decode said pixel data,wherein said one dimensional decoder and said two dimensional decoder process, simultaneously and in parallel, a same frame of pixel data from said frame buffer on a first clock cycle until a successful decode occurs with either of said decoders; and
wherein, upon a successful decode, said decoders access, upon said first clock cycle, another frame of pixel data from said frame buffer.
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Abstract
A portable data terminal including a multi-core processor having at least a first core and a second core, at least one illumination assembly and at least one imaging assembly and data storage means configured to store a plurality of program instructions, the program instructions including at least one one-dimensional decoder and at least one two-dimensional decoder.
346 Citations
20 Claims
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1. A portable data terminal, comprising:
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at least one imaging assembly generating pixel data from a target; a frame buffer receiving said pixel data from said imaging assembly; a data storage means storing a plurality of program instructions implementing at least one one-dimensional decoder and at least one two-dimensional decoder, a processor in communication with said data storage means and executing said program instructions such that said decoders decode said pixel data, wherein said one dimensional decoder and said two dimensional decoder process, simultaneously and in parallel, a same frame of pixel data from said frame buffer on a first clock cycle until a successful decode occurs with either of said decoders; and wherein, upon a successful decode, said decoders access, upon said first clock cycle, another frame of pixel data from said frame buffer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A portable data terminal, comprising:
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at least one imaging assembly generating pixel data from a target; a multi-core processor having at least a first core and a second core executing at least one one-dimensional decoder and at least one two-dimensional decoder; at least one data cache in communication with said multi-core processor and receiving said pixel data such that said pixel data is accessible by both said one-dimensional and two-dimensional decoders; wherein the one-dimensional decoder and two-dimensional decoder run in parallel to process the same pixel data on a first clock cycle, said first clock cycle terminating upon either of said decoders successfully decoding said same pixel data. - View Dependent Claims (11, 12, 13, 14, 15)
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16. A portable data terminal, comprising:
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at least one imaging assembly generating pixel data from either a one dimensionally encoded target or a two dimensionally encoded target; a memory receiving frames of said pixel data from the imaging assembly; a multi-core processor configured to implement a one-dimensional decoder and a two dimensional decoder such that said decoders run in parallel, said processor further configured to direct a respective frame of pixel data to both of said decoders simultaneously; wherein said imaging assembly continuously generates pixel data and said decoders process said frames of data at a frequency determined by successful decodes in either of said decoders. - View Dependent Claims (17, 18, 19, 20)
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Specification