Instruction cache power reduction

• US 9,396,117 B2
• Filed: 01/09/2012
• Issued: 07/19/2016
• Est. Priority Date: 01/09/2012
• Status: Active Grant

• Current Assignee: NVIDIA Corporation
• Original Assignee: NVIDIA Corporation
• Inventors: Aggarwal, Aneesh, Segelken, Ross, Koschoreck, Kevin
• Primary Examiner(s): Shah, Sanjiv
• Assistant Examiner(s): Chappell, Daniel C
• Application Number:
  US13/346,536
• Publication Number:
  US 20130179640A1
• Time in Patent Office: 1,653 Days
• US Class Current: 1/1
• CPC Class Codes: G06F 12/0864 using pseudo-associative means, e.g. set-associative or hashing
• CPC Class Codes: G06F 12/0875 with dedicated cache, e.g. instruction or stack
• CPC Class Codes: G06F 2212/1028 Power efficiency
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

In one embodiment, a method for controlling an instruction cache including a least-recently-used bits array, a tag array, and a data array, includes looking up, in the least-recently-used bits array, least-recently-used bits for each of a plurality of cacheline sets in the instruction cache, determining a most-recently-used way in a designated cacheline set of the plurality of cacheline sets based on the least-recently-used bits for the designated cacheline, looking up, in the tag array, tags for one or more ways in the designated cacheline set, looking up, in the data array, data stored in the most-recently-used way in the designated cacheline set, and if there is a cache hit in the most-recently-used way, retrieving the data stored in the most-recently-used way from the data array.

Claims

1. A method for controlling an instruction cache including a least-recently-used bits array, a tag array, and a data array, comprising:

looking up, in the least-recently-used bits array, least-recently-used bits for each of a plurality of cacheline sets in the instruction cache, where least-recently-used bits for a cacheline set indicate a least-recently-used way in that cacheline set;

determining a most-recently-used way in a designated cacheline set of the plurality of cacheline sets based on the least-recently-used bits for the designated cacheline;

looking up, in the tag array, tags for one or more ways in the designated cacheline set, wherein the looking up tags for one or more ways in the designated cacheline set comprises looking up a tag associated with the most-recently-used way prior to looking up tags in the tag array for other ways in the designated cacheline set;

looking up, in the data array, data stored in the most-recently-used way in the designated cacheline set; and

in response to determining a cache hit in the most-recently-used way based on the tag array, activating only the most-recently-used way and outputting the data stored in the most-recently-used way from the data array.

2. The method of claim 1, where looking up, in the tag array, the tags for one or more ways in the designated cacheline set and looking up, in the data array, the data stored in the most-recently-used way are performed in parallel.

3. The method of claim 1, where looking up, in the least-recently-used bits array, least-recently-used bits for each of the plurality of cacheline sets is performed prior to (1) looking up, in the tag array, the tags for one or more ways in the designated cacheline set and (2) looking up, in the data array, the data stored in the most-recently-used way.

4. The method of claim 1, where looking up, in the data array, data stored in the most-recently-used way in the designated cacheline set includes (1) activating the most-recently-used way of the data array and (2) not activating any other ways of the data array in the designated cacheline set.

5. The method of claim 1, where looking up, in the tag array, the tags for one or more ways in the designated cacheline set includes looking up tags for all ways in the designated cacheline set.

6. The method of claim 5, further comprising:

if there is a cache miss in all of the ways of the designated cacheline set, retrieving instruction data from a higher level memory storage.

7. The method of claim 1, where looking up in the tag array, the tags for one or more ways in the designated cacheline set includes looking up the tag for the most-recently-used way in the designated cacheline set and not looking up tags for other ways besides the most-recently-used way in the designated cacheline set.

8. The method of claim 1, further comprising:

if there is a cache miss in the most-recently-used way, looking up, in the tag array, tags for all ways in the designated cacheline set;

looking up, in the data array, data stored in all ways in the designated cacheline set; and

if there is a cache hit in any of the ways in the designated cacheline set, outputting the data in the hit way from the data array.

9. The method of claim 8, further comprising:

if there is a cache miss in all of the ways of the designated cacheline set, retrieving instruction data from a higher level memory storage.

10. The method of claim 8, where (1) looking up the tags for all ways in the designated cacheline set and (2) looking up the data stored in all ways in the designated cacheline set are performed in parallel.

21. The method of claim 1, wherein the looking up data stored in the most-recently-used way in the designated cacheline set is performed before a determination of whether there is a cache hit in the most-recently-used way.

11. An instruction cache comprising:

a least-recently-used bits array;

a tag array;

a data array; and

a cache controller configured to (1) look up, in the least-recently-used bits array, least-recently-used bits for each of a plurality of cacheline sets in the instruction cache, where least-recently-used bits for a cacheline set indicate a least-recently-used way in that cacheline set, (2) determine a most-recently-used way in a designated cacheline set of the plurality of cachelines sets based on the least-recently-used bits for the designated cacheline set, (3) look up, in the tag array, tags for one or more ways in the designated cacheline set, (4) look up, in the data array, data stored in the most-recently-used way in the designated cacheline set, and in response to a cache hit in the most-recently-used way based on the tag array, activate only the most-recently-used way and (5) output the data stored in the most-recently-used way from the data array, wherein the look up of tags for one or more ways in the designated cacheline set comprises looking up a tag associated with the most-recently-used way prior to looking up tags in the tag array for other ways in the designated cacheline set.

12. The instruction cache of claim 11, where the cache controller is configured to (1) look up, in the tag array, the tags for one or more ways in the designated cacheline set and (2) look up, in the data array, the data stored in the most-recently-used way in parallel.

13. The cache of claim 11, where the cache controller is configured to look up, in the least-recently-used bits array, least-recently-used bits for each of the plurality of cacheline sets prior to (1) looking up, in the tag array, the tags for one or more ways in the designated cacheline set and (2) looking up, in the data array, the data stored in the most-recently-used way.

14. The instruction cache of claim 11, where the cache controller is configured to (1) activate the most-recently-used way in the designated cacheline set of the data array and (2) not activate any other ways in the designated cacheline set of the data array to look up data stored in the most-recently-used way in the designated cacheline set.

15. The instruction cache of claim 11, where the cache controller is configured to look up, in the tag array, the tags for all ways in the designated cacheline set.

16. The instruction cache of claim 15, where the cache controller is configured to (1) if there is a cache miss in the most-recently-used way, look up, in the tag array, tags for all ways in the designated cacheline set, (2) look up, in the data array, data stored in all ways in the designated cacheline set, and (3) if there is a cache hit in any of the ways in the designated cacheline set, outputting the data in the hit way from the data array.

17. The instruction cache of claim 16, further comprising:

if there is a cache miss in all of the ways of the designated cacheline set, retrieving instruction data from a higher level memory storage.

18. A method for controlling an instruction cache including a least-recently-used bits array, a tag array, and a data array, comprising:

looking up, in the least-recently-used bits array, least-recently-used bits for each of a plurality of cacheline sets in the instruction cache, where least-recently-used bits for a cacheline set indicate a least-recently-used way in that cacheline set;

determining a most-recently-used way in a designated cacheline set of the plurality of cacheline sets based on the least-recently-used bits for the designated cacheline;

looking up, in the tag array, tags for all ways in the designated cacheline set, wherein the looking up tags for all ways in the designated cacheline set comprises looking up a tag associated with the most-recently-used way prior to looking up tags in the tag array for other ways in the designated cacheline set;

looking up, in the data array, data stored in the most-recently-used way in the designated cacheline set;

if there is a cache hit in the most-recently-used way based on the tag array, activating only the most-recently-used way and outputting the data stored in the most-recently-used way from the data array;

if there is a cache miss in the most-recently-used way, looking up, in the tag array, tags for all ways in the designated cacheline set;

looking up, in the data array, data stored in all ways in the designated cacheline set; and

if there is a cache hit in any of the ways in the designated cacheline set, outputting the data in the hit way from the data array.

19. The method of claim 18, further comprising:

if there is a cache miss in all of the ways of the designated cacheline set, retrieving instruction data from a higher level memory storage.

20. The method of claim 18, where looking up, in the least-recently-used bits array, least-recently-used bits for each of the plurality of cacheline sets is performed prior to (1) looking up, in the tag array, the tags for all ways in the designated cacheline set and (2) looking up, in the data array, the data stored in the most-recently-used way.