RGBZ pixel cell unit for an RGBZ image sensor

• US 9,425,233 B2
• Filed: 12/22/2014
• Issued: 08/23/2016
• Est. Priority Date: 12/22/2014
• Status: Active Grant

• Current Assignee: Google LLC (Alphabet Inc.)
• Original Assignee: Google Inc. (Alphabet Inc.)
• Inventors: Wan, Chung Chun, Fowler, Boyd
• Primary Examiner(s): Nguyen, Dao H
• Assistant Examiner(s): Nguyen, Tram H
• Application Number:
  US14/579,988
• Publication Number:
  US 20160181295A1
• Time in Patent Office: 610 Days
• Field of Search: 257/81, 257/82, 257/91, 257/98, 257/99, 257/100, 257/116, 257/117, 257432-437, 257/749, 257E33056-E33059, 257/E25.032, 438 25- 28
• US Class Current: 1/1
• CPC Class Codes: G01S 17/894 3D imaging with simultaneous measurement of time-of-flight at a 2D array of receiver pixels, e.g. time-of-flight cameras or flash lidar
• CPC Class Codes: G01S 7/4816 of receivers alone
• CPC Class Codes: G01S 7/4914 of detector arrays, e.g. charge-transfer gates
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70
• CPC Class Codes: H01L 27/14612 involving a transistor
• CPC Class Codes: H01L 27/14621 Colour filter arrangements
• CPC Class Codes: H01L 27/14627 Microlenses
• CPC Class Codes: H01L 27/1463 Pixel isolation structures
• CPC Class Codes: H01L 27/14641 Electronic components shared by two or more pixel-elements, e.g. one amplifier shared by two pixel elements
• CPC Class Codes: H01L 27/1465 of the hybrid type
• CPC Class Codes: H04N 13/271 wherein the generated image signals comprise depth maps or disparity maps
• CPC Class Codes: H04N 23/11 for generating image signals from visible and infrared light wavelengths
• CPC Class Codes: H04N 25/134 based on three different wavelength filter elements
• CPC Class Codes: H04N 25/587 acquired sequentially, e.g. using the combination of odd and even image fields
• CPC Class Codes: H04N 25/705 Pixels for depth measurement, e.g. RGBZ
• CPC Class Codes: H04N 25/75 Circuitry for providing, modifying or processing image signals from the pixel array
• CPC Class Codes: H04N 25/767 Horizontal readout lines, multiplexers or registers
• CPC Class Codes: H04N 25/778 comprising amplifiers shared between a plurality of pixels, i.e. at least one part of the amplifier must be on the sensor array itself
• CPC Class Codes: H04N 5/33 Transforming infrared radiation cameras or camera modules for generating image signals from infrared radiation H04N23/20; circuitry of SSIS for transforming infrared radiation into image signals H04N25/20

Abstract

An image sensor is described. The image sensor includes a pixel array having a unit cell that includes visible light photodiodes and an infra-red photodiode. The visible light photodiodes and the infra-red photodiode are coupled to a particular column of the pixel array. The unit cell has a first capacitor coupled to the visible light photodiodes to store charge from each of the visible light photodiodes. The unit cell having a readout circuit to provide the first capacitor'"'"'s voltage on the particular column. The unit cell having a second capacitor that is coupled to the infra-red photodiode through a transfer gate transistor to receive charge from the infra-red photodiode during a time-of-flight exposure. The unit cell has a back-drain transistor coupled to the infra-red photodiode.

Claims

1. An apparatus, comprising:

an image sensor comprising a pixel array having a unit cell that includes visible light photodiodes and an infra-red photodiode, the visible light photodiodes and the infra-red photodiode coupled to a particular column of the pixel array, the unit cell having a first capacitor coupled to the visible light photodiodes to store charge from each of the visible-light photodiodes, the unit cell having a readout circuit to provide the first capacitor'"'"'s voltage on the particular column, the unit cell having a second capacitor that is coupled to the infra-red photodiode through a transfer gate transistor to receive charge from the infra-red photodiode during a time-of-flight exposure, the unit cell comprising a back-drain transistor coupled to the infra-red photodiode.

2. The apparatus of claim 1 wherein the second capacitor is coupled to the readout circuit, the readout circuit to also provide the second capacitor'"'"'s voltage on the particular column.

3. The apparatus of claim 2 wherein the unit cell comprises a reset transistor that is coupled to both the first and second capacitors to clear respective charge from the first capacitor and the second capacitor.

4. The apparatus of claim 2 wherein the visible light photodiodes are coupled to respective transfer gate transistors and respective back-drain transistors.

5. The apparatus of claim 1 wherein the unit cell comprises a reset transistor that is coupled to both the first and second capacitors to clear respective charge from the first capacitor and the second capacitor.

6. The apparatus of claim 1 wherein the visible light photodiodes are coupled to respective transfer gate transistors and respective back-drain transistors.

7. The apparatus of claim 1 wherein the second capacitor is larger than the first capacitor.

8. The apparatus of claim 1 wherein the unit cell further comprises a second readout circuit coupled to the second capacitor, the second readout circuit to provide the second capacitor'"'"'s voltage on the particular column.

9. The apparatus of claim 1 wherein the back-drain transistor is coupled to the first capacitor.

10. The apparatus of claim 1 wherein the first capacitor is coupled to the second capacitor through a transistor.

11. A method, comprising:

transferring first charge from a first photodiode that has received visible light of a first type into a storage capacitor and reading out a first voltage of the storage capacitor at a pixel array column;

transferring second charge from a second photodiode that has received visible light of a second type into the storage capacitor and reading out a second voltage of the storage capacitor at the pixel array column;

transferring third charge from a third photodiode that has received visible light of a third type into the storage capacitor and reading out a third voltage of the storage capacitor at the pixel array column; and

,

transferring fourth charge from a fourth photodiode that has received infra red light during a time-of-flight exposure into a second storage capacitor and reading out a fourth voltage of the second storage capacitor at the pixel array column.

12. The method of claim 11 further comprising transferring said fourth charge during an exposure time of the fourth photo-diode and performing said transferring of any of said first, second and third charges during said exposure time.

13. The method of claim 11 further comprising transferring said fourth charge during an exposure time of the fourth photo-diode and permitting fifth charge from any of said first, second and third photo-diodes to flow into a supply node during said exposure time.

14. The method of claim 11 further comprising transferring said fourth charge during an exposure time of the fourth photo-diode and performing said reading out of any of said first, second and third voltages during said exposure time.

15. The method of claim 11 further comprising reading out said first, second, third and fourth voltages with a same readout circuit.

16. The method of claim 11 further comprising clearing said first, second and third voltages from said first capacitor and clearing said fourth voltage from said second capacitor with a same reset transistor.

17. A computing system, comprising:

an applications processor having multiple processing cores coupled to a memory controller, said memory controller coupled to a system memory;

a camera system coupled to said applications processor, said camera system comprising an image sensor, said image sensor comprising a pixel array having a unit cell that includes visible light photodiodes and an infra-red photodiode, the visible light photodiodes and the infra-red photodiode coupled to a particular column of the pixel array, the unit cell having a first capacitor coupled to the visible light photodiodes to store charge from each of the visible-light photodiodes, the unit cell having a readout circuit to provide the first capacitor'"'"'s voltage on the particular column, the unit cell having a second capacitor that is coupled to the infra-red photodiode through a transfer gate transistor to receive charge from the infra-red photodiode during a time-of-flight exposure, the unit cell comprising a back-drain transistor coupled to the infra-red photodiode.

18. The computing system of claim 17 wherein the second capacitor is coupled to the readout circuit, the readout circuit to also provide the second capacitor'"'"'s voltage on the particular column.

19. The computing system of claim 18 wherein the unit cell comprises a reset transistor that is coupled to both the first and second capacitors to clear respective charge from the first capacitor and the second capacitor.

20. The computing system of claim 18 wherein the visible light photodiodes are coupled to respective transfer gate transistors and respective back-drain transistors.

21. The computing system of claim 17 wherein the unit cell comprises a reset transistor that is coupled to both the first and second capacitors to clear respective charge from the first capacitor and the second capacitor.

22. The computing system of claim 17 wherein the visible light photodiodes are coupled to respective transfer gate transistors and respective back-drain transistors.

23. The computing system of claim 17 wherein the back-drain transistor is coupled to the first capacitor.

24. The computing system of claim 17 wherein the first capacitor is coupled to the second capacitor through a transistor.

25. The computing system of claim 17 wherein the second capacitor is larger than the first capacitor.