Semiconductor chip including region having integrated circuit transistor gate electrodes formed by various conductive structures of specified shape and position and method for manufacturing the same

CAFC
  • US 9,443,947 B2
  • Filed: 05/13/2015
  • Issued: 09/13/2016
  • Est. Priority Date: 03/09/2006
  • Status: Active Grant
First Claim
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1. A semiconductor chip, comprising:

  • a region including a plurality of transistors, each of the plurality of transistors in the region forming part of circuitry associated with execution of one or more logic functions, the region including at least eight conductive structures formed within the semiconductor chip, some of the at least eight conductive structures forming at least one transistor gate electrode,each of the at least eight conductive structures respectively having a corresponding top surface, wherein an entirety of a periphery of the corresponding top surface is defined by a corresponding first end, a corresponding second end, a corresponding first edge, and a corresponding second edge, such that a total distance along the entirety of the periphery of the corresponding top surface is equal to a sum of a total distance along the corresponding first edge and a total distance along the corresponding second edge and a total distance along the corresponding first end and a total distance along the corresponding second end,wherein the total distance along the corresponding first edge is greater than two times the total distance along the corresponding first end,wherein the total distance along the corresponding first edge is greater than two times the total distance along the corresponding second end,wherein the total distance along the corresponding second edge is greater than two times the total distance along the corresponding first end,wherein the total distance along the corresponding second edge is greater than two times the total distance along the corresponding second end,wherein the corresponding first end extends from the corresponding first edge to the corresponding second edge and is located principally within a space between the corresponding first and second edges,wherein the corresponding second end extends from the corresponding first edge to the corresponding second edge and is located principally within the space between the corresponding first and second edges,the top surfaces of the at least eight conductive structures co-planar with each other,each of the at least eight conductive structures having a corresponding lengthwise centerline oriented in a first direction along its top surface and extending from its first end to its second end,each of the at least eight conductive structures having a length as measured along its lengthwise centerline from its first end to its second end,wherein the first edge of each of the at least eight conductive structures is substantially straight,wherein the second edge of each of the at least eight conductive structures is substantially straight,each of the at least eight conductive structures having both its first edge and its second edge oriented substantially parallel to its lengthwise centerline,each of the at least eight conductive structures having a width measured in a second direction perpendicular to the first direction at a midpoint of its lengthwise centerline,each of the first direction and the second direction oriented substantially parallel to the co-planar top surfaces of the at least eight conductive structures,wherein the at least eight conductive structures are positioned in a side-by-side manner such that each of the at least eight conductive structures is positioned to have at least a portion of its length beside at least a portion of the length of another of the at least eight conductive structures,wherein the width of each of the at least eight conductive structures is less than 45 nanometers, the region having a size of about 965 nanometers as measured in the second direction, each of the at least eight conductive structures positioned such that a distance as measured in the second direction between its lengthwise centerline and the lengthwise centerline of at least one other of the at least eight conductive structures is substantially equal to a first pitch that is less than or equal to about 193 nanometers,the region including a first transistor of a first transistor type, a second transistor of the first transistor type, a first transistor of a second transistor type, and a second transistor of the second transistor type,wherein each transistor of the first transistor type having its gate electrode formed by any of the at least eight conductive structures is included in a first collection of transistors, and wherein each transistor of the second transistor type having its gate electrode formed by any of the at least eight conductive structures is included in a second collection of transistors, wherein the first and second collections of transistors are separated from each other by an inner sub-region of the region, wherein the inner sub-region does not include a source or a drain of any transistor,the first transistor of the first transistor type having a gate electrode formed by a portion of a first conductive structure of the at least eight conductive structures, wherein any transistor having its gate electrode formed by the first conductive structure is of the first transistor type,the second transistor of the first transistor type having a gate electrode formed by a portion of a second conductive structure of the at least eight conductive structures, the first transistor of the second transistor type having a gate electrode formed by another portion of the second conductive structure, the second conductive structure positioned such that its lengthwise centerline is separated from the lengthwise centerline of the first conductive structure by the first pitch as measured in the second direction,the second transistor of the second transistor type having a gate electrode formed by one of the at least eight conductive structures, the conductive structure that forms the gate electrode of the second transistor of the second transistor type positioned such that its lengthwise centerline is separated from the lengthwise centerline of the second conductive structure by the first pitch as measured in the second direction, wherein any transistor having its gate electrode formed by the conductive structure that forms the gate electrode of the second transistor of the second transistor type is of the second transistor type,the first conductive structure having a total length as measured in the first direction that is greater than one-half of a total length of the second conductive structure as measured in the first direction,the second conductive structure having at least one end substantially positioned at a first reference line oriented in the second direction, and the conductive structure that forms the gate electrode of the second transistor of the second transistor type also having at least one end substantially positioned at the first reference line.

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