Solid-state imaging element having image signal overflow path

• US 9,445,020 B2
• Filed: 01/13/2016
• Issued: 09/13/2016
• Est. Priority Date: 06/08/1998
• Status: Expired due to Fees

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Ueno, Takahisa, Yonemoto, Kazuya, Suzuki, Ryoji, Shiono, Koichi
• Primary Examiner(s): MOE, AUNG SOE
• Application Number:
  US14/994,935
• Publication Number:
  US 20160127666A1
• Time in Patent Office: 244 Days
• Field of Search: 348/308, 348/307, 348/311, 348/301, 348/304, 348/292, 348/294, 250/208.1, 257/291, 257/292, 257/239
• US Class Current: 1/1
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70
• CPC Class Codes: H01L 27/14612 involving a transistor
• CPC Class Codes: H01L 27/14638 Structures specially adapted for transferring the charges across the imager perpendicular to the imaging plane
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H04N 25/00 Circuitry of solid-state image sensors [SSIS]; Control thereof
• CPC Class Codes: H04N 25/40 Extracting pixel data from image sensors by controlling scanning circuits, e.g. by modifying the number of pixels sampled or to be sampled
• CPC Class Codes: H04N 25/441 by reading contiguous pixels from selected rows or columns of the array, e.g. interlaced scanning
• CPC Class Codes: H04N 25/65 applied to reset noise, e.g. KTC noise related to CMOS structures by techniques other than CDS
• CPC Class Codes: H04N 25/767 Horizontal readout lines, multiplexers or registers
• CPC Class Codes: H04N 25/77 Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
• CPC Class Codes: H04N 25/778 comprising amplifiers shared between a plurality of pixels, i.e. at least one part of the amplifier must be on the sensor array itself
• CPC Class Codes: H04N 3/1512 for MOS image-sensors, e.g. MOS-CCD H04N3/1581 takes precedence
• CPC Class Codes: H04N 3/155 Control of the image-sensor operation, e.g. image processing within the image-sensor

Abstract

Since the great number of elements constituting a unit pixel having an amplification function would hinder reduction of pixel size, unit pixel n,m arranged in a matrix form is comprised of a photodiode, a transfer switch for transferring charges stored in the photodiode, a floating diffusion for storing charges transferred by the transfer switch, a reset switch for resetting the floating diffusion, and an amplifying transistor for outputting a signal in accordance with the potential of the floating diffusion to a vertical signal line, and by affording vertical selection pulse φVn to the drain of the reset switch to control a reset potential thereof, pixels are selected in units of rows.

Claims

1. An imaging device comprising:

a plurality of pixels, at least one of the pixels including

a photoelectric conversion element,

a charge store element,

a reset transistor configured to connect a first voltage line to the charge store element according to a reset pulse supplied via a reset line, and

an amplifying transistor configured to connect a second voltage line to a signal line according to a potential of the charge store element,

wherein an oxide film is arranged between the photoelectric conversion element and a contact region, the contact region being electrically connected to the second voltage line.

2. The imaging device according to claim 1, wherein the one of the pixels further includes a transfer transistor configured to connect the photoelectric conversion element to the charge store element according to a transfer pulse supplied via a transfer line.

3. The imaging device according to claim 2, wherein a negative potential is applied to the control terminal of the transfer transistor.

4. The imaging device according to claim 1, wherein a region in which the oxide film arranged is configured to discharge charges from the photoelectric conversion element to the second voltage line.

5. The imaging device according to claim 1, wherein the first voltage line is configured to supply a first voltage and a second voltage.

6. The imaging device according to claim 1, wherein a potential of the first voltage line is not fixed.

7. The imaging device according to claim 1, wherein the amplifying transistor is directly connected to the signal line.

8. The imaging device according to claim 1, wherein the charge store element is a floating diffusion region.

9. The imaging device according to claim 1, wherein the reset transistor is configured to reset the charge store element.

10. The imaging device according to claim 1, wherein the photoelectric conversion element is configured to convert incident light into a signal charge.

11. The imaging device according to claim 1,

wherein the signal line extends along a first direction, and

wherein the first voltage line, the second voltage line, and the reset line extend along a second direction which is different with the first direction.

12. The imaging device according to claim 1, further comprising a vertical scanning circuit and a horizontal scanning circuit.

13. The imaging device according to claim 12, further comprising an output circuit configured to output image signals supplied from the plurality of pixels according to the horizontal scanning circuit.

14. The imaging device according to claim 1, wherein the reset transistor is a depression type transistor.

15. An electronic apparatus comprising the imaging device according to claim 1.

16. An imaging device comprising:

a plurality of pixels, at least one of the pixels including

a photoelectric conversion element,

a reset transistor configured to reset a potential of the photoelectric conversion element, and

an amplifying transistor configured to output signals according to a potential of the photoelectric conversion element to a signal line,

wherein the amplifying transistor is applied a voltage, and

wherein an oxide film is arranged between said photoelectric conversion element and a contact region, the contact region applied the voltage.

17. The imaging device according to claim 16, wherein the one of the pixels further includes a transfer transistor configured to transfer charges from the photoelectric conversion element to a charge store element.

18. The imaging device according to claim 17, wherein the charge store element is a floating diffusion region.

19. The imaging device according to claim 17, wherein the reset transistor is configured to reset the charge store element.

20. The imaging device according to claim 17, wherein a negative potential is applied to the control terminal of the transfer transistor.

21. The imaging device according to claim 16, wherein a region in which the oxide film arranged is configured to discharge charges from the photoelectric conversion element.

22. The imaging device according to claim 16, wherein the reset transistor is configured to be applied a first voltage and a second voltage.

23. The imaging device according to claim 16, wherein the amplifying transistor is directly connected to the signal line.

24. The imaging device according to claim 16, wherein the photoelectric conversion element is configured to convert incident light into a signal charge.

25. The imaging device according to claim 16, further comprising a vertical scanning circuit and a horizontal scanning circuit.

26. The imaging device according to claim 25, further comprising an output circuit configured to output image signals supplied from the plurality of pixels according to the horizontal scanning circuit.

27. The imaging device according to claim 16, wherein the reset transistor is a depression type transistor.

28. An electronic apparatus comprising the imaging device according to claim 16.