Capacitive level shifter devices, methods and systems

• US 9,467,060 B2
• Filed: 04/03/2013
• Issued: 10/11/2016
• Est. Priority Date: 04/03/2013
• Status: Active Grant

• Current Assignee: NXP B.V. (NXP Semiconductors NV)
• Original Assignee: NXP B.V. (NXP Semiconductors NV)
• Inventors: Boezen, Hendrik
• Primary Examiner(s): Barnie, Rexford
• Assistant Examiner(s): INGE, JOSEPH N
• Application Number:
  US13/856,184
• Publication Number:
  US 20140300188A1
• Time in Patent Office: 1,287 Days
• Field of Search: 307/31
• US Class Current: 1/1
• CPC Class Codes: H02M 5/293 using semiconductor devices only
• CPC Class Codes: H03K 17/689 with galvanic isolation between the control circuit and the output circuit H03K17/78 takes precedence
• CPC Class Codes: H03K 19/017509 Interface arrangements
• CPC Class Codes: H03K 19/018521 of complementary type, e.g. CMOS

Abstract

Systems and methods of use relate to a circuit that is designed to detect the state of two control signals, wherein one control signal indicates an ON state for the gate driver and the other control signal indicates an OFF state for the gate driver. The circuit responds to each of the control signals by controlling the gate driver so that it drives an output either high or low. The circuit can also be configured to control the gate driver so that it to drives the output (either high or low) when neither control signal is present.

Claims

1. A device comprising:

in a first voltage domain,

a first signal driver circuit configured and arranged to generate a first signal with information that is encoded using a presence of a carrier wave, and

a second signal driver circuit configured and arranged to generate a second signal with information that is encoded using a presence of a carrier wave;

in a second voltage domain,

a first determination circuit, configured and arranged to detect the presence of a carrier wave on a first input, and

a second determination circuit, configured and arranged to detect the presence of a carrier wave on a second input;

a first signal path capacitively coupling the first signal to the first input;

a second signal path capacitively coupling the second signal to the second input;

a first output circuit configured and arranged to drive, in response to a detection of a carrier wave from the first determination circuit, an output node to a high voltage in the second voltage domain; and

a second output circuit configured and arranged to drive, in response to a detection of a carrier wave from the second determination circuit, the output node to a low voltage in the second voltage domain.

2. The device of claim 1, wherein the device is configured and arranged to provide level shifting for an input signal that is in the first voltage domain and that carries the information.

3. The device of claim 1, wherein the first output circuit includes a transistor having a drain and a source coupled between a voltage source providing the high voltage and the output node.

4. The device of claim 3, wherein the second output circuit includes a transistor having a drain and a source coupled between a voltage source providing the low voltage and the output node.

5. The device of claim 1, wherein the first and second signal paths are each differential signal paths.

6. The device of claim 1, wherein the first and second signal paths are each single-ended signal paths and wherein the carrier wave for each of the first and second signal has a frequency of at least 1 GHz.

7. The device of claim 1, wherein the first determination circuit includes:

a current mirror that mirrors a current in a first current path onto a second according to a ratio of the current mirror;

a resistor divider network between differential signals of the first input; and

a pair of transistors configured to increase current in the second current path in response to the presence a carrier wave and drive the output by overcoming the mirrored current of the current mirror.

8. The device of claim 1, further including an oscillator circuit that is configured and arranged to generate the carrier wave in response to a first signal level and to generate a steady state voltage in response to a second, different signal level.

9. The device of claim 1, wherein the output is a high-side gate driver circuit.

10. The device of claim 1, wherein the first signal in the first voltage domain has a high voltage value that is less than the high voltage in the second voltage domain.

11. The device of claim 1, wherein the first signal in the first voltage domain has a high voltage value that is more than the high voltage in the second voltage domain.

16. The device of claim 1, wherein the first signal is a first control signal that indicates an ON state for a high-side transistor, and the second signal is a second control signal that indicates an OFF state for the high-side transistor.

17. The device of claim 1, wherein the output node is connected to a gate of a high-side transistor.

18. The device of claim 1, wherein the first determination circuit is configured to detect the presence of a carrier wave when there is no carrier wave present on the second input.

12. A method comprising:

in a first voltage domain, generating, using a first signal driver circuit a first signal with information that is encoded using a presence of a carrier wave, and

generating, using a second signal driver circuit, a second signal with information that is encoded using a presence of a carrier wave;

capacitively coupling, using a first signal path, the first signal to a first input in a second voltage domain;

capacitively coupling, using a second signal path, the second signal to a second input in the second voltage domain;

in the second voltage domain,

detecting, using a first determination circuit, the presence of a carrier wave on the first input, and

detecting, using a second determination circuit, the presence of a carrier wave on the second input;

driving, using a first output circuit and in response to detecting the presence of a carrier wave using the first determination circuit, an output node to a high voltage in the second voltage domain; and

driving, using a second output circuit and in response to detecting the presence of a carrier wave using the second determination circuit, the output node to a low voltage in the second voltage domain.

13. The method of claim 12, wherein the step of generating the first signal includes using an oscillator circuit to generate an alternating current (AC) signal.

14. The method of claim 12, wherein the step of generating the first signal includes generating a differential signal.

15. The method of claim 12, wherein the step of detecting the presence of a carrier wave on the first input includes increasing current through a transistor fed by a current mirror and thereby overcoming a counteracting current.

19. The method of claim 12, wherein the generating the first signal is responsive to a first input data signal and generating the first signal is responsive to a second input data signal that is separately controllable from the first input data signal.

20. The method of claim 19, wherein the first input data signal indicates an ON state for a high-side transistor and the second input data signal indicates an OFF state for the high-side transistor.