Circuit substrate having a circuit pattern and method for making the same

• US 9,474,161 B2
• Filed: 11/05/2015
• Issued: 10/18/2016
• Est. Priority Date: 03/12/2010
• Status: Active Grant

• Current Assignee: Taiwan Green Point Enterprises Company Limited (Jabil Inc.)
• Original Assignee: Taiwan Green Point Enterprises Company Limited (Jabil Inc.)
• Inventors: Yi, Sheng-Hung, Liao, Pen-Yi
• Primary Examiner(s): Tran, Binh X
• Application Number:
  US14/933,616
• Publication Number:
  US 20160057865A1
• Time in Patent Office: 348 Days
• Field of Search: 216/13, 216/17, 216/18, 216/65, 216/94
• US Class Current: 1/1
• CPC Class Codes: B23K 2101/34 Coated articles , e.g. plated or painted; Surface treated articles
• CPC Class Codes: B23K 2101/40 Semiconductor devices
• CPC Class Codes: B23K 2103/50 Inorganic material, e.g. metals, not provided for in B23K2103/02 – B23K2103/26
• CPC Class Codes: B23K 2103/56 semiconducting semiconducting devices B23K2101/40
• CPC Class Codes: B23K 26/362 Laser etching
• CPC Class Codes: B23K 26/364 for making a groove or trench, e.g. for scribing a break initiation groove
• CPC Class Codes: B23K 26/402 involving non-metallic material, e.g. isolators
• CPC Class Codes: C23C 18/1603 coating on selected surface areas
• CPC Class Codes: C23C 18/1653 Two or more layers with at least one layer obtained by electroless plating and one layer obtained by electroplating
• CPC Class Codes: C23C 18/1689 After-treatment
• CPC Class Codes: C23C 18/2013 by mechanical pretreatment, e.g. grinding, sanding
• CPC Class Codes: C25D 3/12 of nickel or cobalt
• CPC Class Codes: C25D 3/38 of copper
• CPC Class Codes: C25D 3/46 of silver
• CPC Class Codes: C25D 3/48 of gold
• CPC Class Codes: C25D 5/02 Electroplating of selected surface areas
• CPC Class Codes: C25D 7/12 Semiconductors
• CPC Class Codes: C25F 5/00 Electrolytic stripping of metallic layers or coatings
• CPC Class Codes: H05K 2201/09036 Recesses or grooves in insulating substrate recess in metallic substrate H05K2201/09745
• CPC Class Codes: H05K 2201/09363 wherein only contours around conductors are removed for insulation
• CPC Class Codes: H05K 2203/0392 : Pretreatment of metal, e.g. before finish plating, etching improvement of the adhesion between an insulating substrate and a metal by special treatment of the metal H05K3/382
• CPC Class Codes: H05K 2203/107 : Using laser light shaping a substrate by laser ablation H05K3/0026
• CPC Class Codes: H05K 3/0026 : by laser ablation
• CPC Class Codes: H05K 3/0041 : by plasma etching
• CPC Class Codes: H05K 3/027 : the conductive material being removed by irradiation, e.g. by photons, alpha or beta particles
• CPC Class Codes: H05K 3/067 : Etchants
• CPC Class Codes: H05K 3/107 : by filling grooves in the support with conductive material H05K3/045, H05K3/101, H05K3/1258 and H05K3/465 take precedence
• CPC Class Codes: H05K 3/185 : by making a catalytic pattern by photo-imaging
• CPC Class Codes: H05K 3/24 : Reinforcing the conductive pattern by solder coating H05K3/3457
• CPC Class Codes: H05K 3/4661 : Adding a circuit layer by direct wet plating, e.g. electroless plating; insulating materials adapted therefor other insulating materials H05K3/387
• CPC Class Codes: Y10T 29/49155 : Manufacturing circuit on or in base

Abstract

A circuit substrate includes: an insulative substrate formed with a pattern of a recess, the recess being defined by a recess-defining wall that has a bottom wall surface and a surrounding wall surface extending upwardly from the bottom wall surface; a patterned metallic layer structure including at least a patterned active metal layer disposed within the recess, formed on the bottom wall surface of the recess-defining wall, and spaced apart from the surrounding wall surface of the recess-defining wall, the patterned active metal layer containing an active metal capable of initiating electroless plating; and a primary metal layer plated on the patterned metallic layer structure.

Claims

1. A method for making a circuit substrate having a circuit pattern, the method comprising:

(a) providing an insulative substrate having a top surface;

(b) forming a pattern of a recess in the insulative substrate such that the recess is indented from the top surface, the recess being defined by a recess-defining wall having a bottom wall surface and a surrounding wall surface extending upwardly from the bottom wall surface;

(c) forming a metallic layer structure on the recess-defining wall of the recess and the top surface of the insulative substrate, the metallic layer structure including at least one active metal layer containing an active metal capable of initiating electroless plating;

(d) removing a portion of the metallic layer structure that is disposed along a peripheral edge of the bottom wall surface of the recess-defining wall so as to form the metallic layer structure into a first region which is disposed on the bottom wall surface, and a second region which is physically separated from the first region; and

(e) plating a primary metal layer on the first region of the metallic layer structure.

2. The method of claim 1, wherein, in step (b), the recess in the insulative substrate is formed by laser or plasma ablation.

3. The method of claim 1, wherein, in step (d), the portion of the metallic layer structure is removed by laser ablation.

4. The method of claim 1, wherein in step (e), the primary metal layer has a top surface substantially flush with or disposed above the top surface of the insulative substrate.

5. The method of claim 1, wherein, in step (c), the active metal of the active metal layer is a reduced active metal, and the metallic layer structure is formed on the recess-defining wall of the recess and the top surface of the insulative substrate by immersing the insulative substrate into an active metal solution containing a non-reduced active metal so as to form a non-reduced metal layer containing the non-reduced active metal on the recess-defining wall of the recess and the top surface of the insulative substrate and then reducing the non-reduced active metal of the non-reduced metal layer so as to form the active metal layer containing the reduced active metal.

6. The method of claim 5, wherein, in step (e), the primary metal layer is formed on the first region of the metallic layer structure by electroplating.

7. The method of claim 1, wherein, in step (c), the active metal of the active metal layer is a non-reduced active metal, and the metallic layer structure is formed on the recess-defining wall of the recess and the top surface of the insulative substrate by immersing the insulative substrate into an active metal solution containing the non-reduced active metal so as to form the active metal layer containing the non-reduced active metal on the recess-defining wall of the recess and the top surface of the insulative substrate and then electroless plating an intermediate metal layer on the active metal layer.

8. The method of claim 7, wherein, in step (e), the primary metal layer is formed on the intermediate metal layer of the first region of the metallic layer structure by electroplating.

9. The method of claim 1, further comprising, after step (e), removing the second region of the metallic layer structure from the insulative substrate.

10. The method of claim 9, wherein the second region of the metallic layer structure is removed from the insulative substrate by electrolysis.

11. The method of claim 1, wherein, in step (c), the active metal of the active metal layer is a non-reduced active metal, and the metallic layer structure is formed on the recess-defining wall of the recess and the top surface of the insulative substrate by immersing the insulative substrate into an active metal solution containing the non-reduced active metal so as to form the active metal layer containing the non-reduced active metal on the recess-defining wall of the recess and the top surface of the insulative substrate.

12. The method of claim 11, wherein, in step (e), the primary metal layer is formed on the active metal layer of the first region of the metallic layer structure by electroless plating.

13. The method of claim 12, further comprising, after step (e), electroplating a top metal layer on the primary metal layer.

14. A method for making a circuit substrate having a circuit pattern, the method comprising:

(a) providing an insulative substrate having a top surface;

(b) forming a pattern of a recess in the insulative substrate by a laser such that the recess is indented from the top surface, the recess being defined by a recess-defining wall having a bottom wall surface and a surrounding wall surface extending upwardly from the bottom wall surface;

(c) forming a metallic layer structure on the recess-defining wall of the recess and the top surface of the insulative substrate, the metallic layer structure including at least one active metal layer containing an active metal capable of initiating electroless plating;

(d) removing a portion of the metallic layer structure that is disposed along a peripheral edge of the bottom wall surface of the recess-defining wall so as to form the metallic layer structure into a first region which is disposed on the bottom wall surface, and a second region which is physically separated from the first region; and

(e) electroless plating a primary metal layer on the first region of the metallic layer structure.

15. The method of claim 14, further comprising, after step (e), electroplating a top metal layer on the primary metal layer.

16. The method of claim 14, wherein, in step (d), the portion of the metallic layer structure is removed by laser ablation.

17. A method for making a circuit substrate having a circuit pattern, the method comprising:

(a) providing an insulative substrate having a top surface;

(b) forming a pattern of a recess in the insulative substrate by a laser such that the recess is indented from the top surface, the recess being defined by a recess-defining wall having a bottom wall surface and a surrounding wall surface extending upwardly from the bottom wall surface;

(c) forming a metallic layer structure on the recess-defining wall of the recess and the top surface of the insulative substrate, the metallic layer structure including at least one active metal layer containing an active metal capable of initiating electroless plating;

(d) removing a portion of the metallic layer structure that is disposed along a peripheral edge of the bottom wall surface of the recess-defining wall by laser ablation so as to form the metallic layer structure into a first region which is disposed on the bottom wall surface, and a second region which is physically separated from the first region; and

(e) plating a primary metal layer on the first region of the metallic layer structure.

18. The method of claim 17, wherein in step (e), the primary metal layer has a top surface substantially flush with or disposed above the top surface of the insulative substrate.

19. The method of claim 17, wherein, in step (e), the primary metal layer is formed on the active metal layer of the first region of the metallic layer structure by electroless plating.

20. The method of claim 19, further comprising, after step (e), electroplating a top metal layer on the primary metal layer.