Methods, devices and systems for variable size logical page management in a solid state drive

• US 9,507,523 B1
• Filed: 10/12/2012
• Issued: 11/29/2016
• Est. Priority Date: 10/12/2012
• Status: Active Grant

• Current Assignee: JP Morgan Chase Bank, N.A. (JP Morgan Chase & Co)
• Original Assignee: Skyera, LLC (Western Digital Corporation), Western Digital Technologies Incorporated (Western Digital Corporation)
• Inventors: Mullendore, Rodney N., Danilak, Radoslav, Jones, Justin, Tomlin, Andrew J.
• Primary Examiner(s): Parikh, Kalpit
• Application Number:
  US13/651,313
• Time in Patent Office: 1,509 Days
• US Class Current: 1/1
• CPC Class Codes: G06F 12/0238 Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/1024 Latency reduction
• CPC Class Codes: G06F 2212/1036 Life time enhancement
• CPC Class Codes: G06F 2212/7201 Logical to physical mapping or translation of blocks or pages
• CPC Class Codes: G06F 2212/7208 Multiple device management, e.g. distributing data over multiple flash devices
• CPC Class Codes: G06F 3/0604 Improving or facilitating administration, e.g. storage management
• CPC Class Codes: G06F 3/0638 Organizing or formatting or addressing of data
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]

Abstract

A data storage device may comprise an array of flash memory devices comprising a plurality of blocks, each comprising a plurality of physical pages. A controller may be coupled to and configured to program and read data from the array responsive to host commands. The controller may be configured to store data in a plurality of logical pages (L-Pages) of different sizes, each associated with an L-Page number that is configured to enable the host to logically reference data stored in one or more of the physical pages; and maintain a logical-to-physical address translation map configured to enable the controller to determine a location, within one or more physical pages, of the data referenced by each L-Page number. The translation map may comprise a plurality of mapping entries arranged by L-Page numbers, each comprising a complete starting physical address of an L-Page within one of the physical pages.

Claims

1. A data storage device, comprising:

an array of flash memory devices comprising a plurality of blocks, each comprising a plurality of physical pages;

a controller coupled to the array of memory devices and configured to program and read data from the array of memory devices responsive to data access commands from a host, wherein the controller is configured to;

store data in a plurality of logical pages (L-Pages) of different sizes, each of the plurality of L-Pages being associated with an L-Page number that is configured to enable the host to logically reference data stored in one or more of the plurality of physical pages;

maintain a logical-to-physical address translation map configured to enable the controller to determine a location, within one or more physical pages, of the data referenced by each L-Page number,

wherein the translation map comprises a plurality of mapping entries arranged by L-Page numbers, each mapping entry comprising;

a complete starting physical address of an L-Page within one of the plurality of physical pages, and

a size of the L-Page associated with the L-Page number of the mapping entry;

maintain a system journal (S-Journal) that includes a plurality of journal entries, wherein each of the plurality of journal entries is configured to associate one or more of the plurality of physical pages to each of the plurality of L-pages; and

create a journal entry directly into one of the plurality of journals each time a logical page in the logical-to-physical address translation map is updated.

2. The data storage device of claim 1, wherein the controller is further configured to, upon an update to one of the plurality of L-Pages, update the translation map with a single entry to associate the updated L-Page to a new physical location.

3. The data storage device of claim 2, wherein the controller is further configured to update the translation map with a size of the updated L-Page.

4. The data storage device of claim 1, wherein at least one of the plurality of L-Pages is configured to have a starting address that is un-aligned with a physical page address boundary.

5. The data storage device of claim 1, wherein at least one of the plurality of L-Pages is configured to have an ending address that is un-aligned with a physical page address boundary.

6. The data storage device of claim 1, wherein at least one of the plurality of L-Pages is configured to span more than one physical page.

7. The data storage device of claim 1, wherein at least one of the plurality of L-Pages is configured to be of a size such that more than one L-Page fits within a single physical page.

8. The data storage device of claim 1, wherein each of the plurality of blocks comprises a plurality of F-Pages and wherein at least one of the plurality of L-Pages is configured to span from a physical page in a first F-Page to a physical page in a second F-Page.

9. The data storage device of claim 8, wherein at least one of the plurality of F-Pages is of a size corresponding to a minimum unit of program for the data storage device.

10. The data storage device of claim 1, wherein at least one of the plurality of L-Pages is configured to be configured by a host.

11. The data storage device of claim 1, wherein at least one of the plurality of L-Pages is configured to have a size ranging from a first uncompressed size to a predetermined minimum compressed size.

12. The data storage device of claim 1, wherein at least one of the plurality of physical pages comprises an error correction page (E-Page) comprising a data portion and an error correction code portion.

13. A method of controlling a data storage device comprising a volatile memory and a plurality of non-volatile memory devices, each of the plurality of non-volatile devices being configured to store a plurality of physical pages, each of the physical pages being stored at a predetermined physical location within the plurality of non-volatile memory devices, the method comprising:

storing data in at least one of a plurality of logical pages (L-Pages) of different sizes, each of the plurality of L-Pages being associated with an L-Page number that enables the controller to logically reference the data stored in one or more of the physical pages; and

maintaining a logical-to-physical address translation map in the volatile memory, the address translation map being configured to enable the controller to determine a physical location, within one or more of the plurality of physical pages, of the data referenced by each L-Page number, the address translation map comprising a plurality of mapping entries arranged by L-Page number, each mapping entry comprising a complete physical starting address of an L-Page within one of the plurality of physical pages and a size of the L-Page associated with the L-Page number of the mapping entry;

maintaining a system journal (S-Journal) in one of the plurality of non-volatile memory devices that includes a plurality of journal entries, wherein each of the plurality of journal entries is configured to associate one or more of the plurality of physical pages to each of the plurality of L-pages; and

creating a journal entry directly into one of the plurality of journals each time a logical page in the logical-to-physical address translation map is updated.

14. The method of claim 13, wherein maintaining comprises, upon an update to one of the plurality of L-Pages, updating the address translation map with a single entry configured to associate an L-Page number of the updated L-Page to a new physical location.

15. The method of claim 14, wherein maintaining further comprises updating the address translation map with a size of the updated L-Page.

16. The method of claim 13, wherein storing further comprises storing at least one of the plurality of L-Pages at a starting address that is un-aligned with a physical page starting or ending address boundary.

17. The method of claim 13, wherein storing comprises storing at least one of the plurality of L-Pages such that an ending address thereof is un-aligned with a physical page starting or ending address boundary.

18. The method of claim 13, wherein storing comprises storing the data in at least one L-Page that spans more than one physical page.

19. The method of claim 13, wherein storing comprises storing the data in at least one L-Page that is configured to be of a size such that more than one L-Page fits within a single physical page.

20. The method of claim 13, wherein each of the plurality of blocks comprises a plurality of F-Pages and wherein storing comprises storing at least one of the plurality of L-Pages in such a manner as to span from a physical page in a first F-Page to a physical page in a second F-Page.

21. The method of claim 13, wherein at least one of the plurality of F-Pages is of a size corresponding to a minimum unit of program for the data storage device.

22. The method of claim 13, wherein at least one of the plurality of L-Pages is configured by a host.

23. The method of claim 13, wherein storing comprises compressing at least one of the plurality of L-Pages to a size ranging from a first uncompressed size to a predetermined minimum compressed size.

24. The method of claim 13, wherein at least one of the plurality of physical pages comprises an error correction page (E-Page) comprising a data portion and an error correction code portion.

25. A solid state drive controller, comprising:

a buffer configured to couple to an array of flash memory devices comprising a plurality of blocks, each comprising a plurality of physical pages; and

a processor coupled to the buffer, the processor being configured to program and read data from the array of flash memory devices responsive to data access commands from a host, wherein the processor is further configured to;

store data in a plurality of logical pages (L-Pages) of different sizes, each of the plurality of L-Pages being associated with an L-Page number that is configured to enable the host to logically reference data stored in one or more of the plurality of physical pages; and

maintain a logical-to-physical address translation map configured to enable the processor to determine a location, within one or more physical pages, of the data referenced by each L-Page number, wherein the translation map comprises a plurality of mapping entries arranged by L-Page numbers, each mapping entry comprising a complete starting physical address of an L-Page within one of the plurality of physical pages and a size of the L-Page associated with the L-Page number of the mapping entry;

maintain a system journal (S-Journal) that includes a plurality of journal entries, wherein each of the plurality of journal entries is configured to associate one or more of the physical pages to each of the plurality of L-pages; and

create a journal entry directly into one of the plurality of journals each time a logical page in the logical-to-physical address translation map is updated.

26. The solid state drive controller of claim 25, wherein the processor is further configured to, upon an update to one of the plurality of L-Pages, update the address translation map with a single entry to associate the updated L-Page to a new physical location.

27. The solid state drive controller of claim 26, wherein the processor is further configured to update the address translation map with a size of the updated L-Page.

28. The solid state drive controller of claim 25, wherein at least one of the plurality of L-Pages is configured to have a starting address that is un-aligned with a physical page address boundary.

29. The solid state drive controller of claim 25, wherein at least one of the plurality of L-Pages is configured to have an ending address that is un-aligned with a physical page address boundary.

30. The solid state drive controller of claim 25, wherein at least one of the plurality of L-Pages is configured to span more than one physical page.

31. The solid state drive controller of claim 25, wherein at least one of the plurality of L-Pages is configured to be of a size such that more than one L-Page fits within a single physical page.

32. The solid state drive controller of claim 25, wherein each of the plurality of blocks comprises a plurality of F-Pages and wherein at least one of the plurality of L-Pages is configured to span from a physical page in a first F-Page to a physical page in a second F-Page.

33. The solid state drive controller of claim 32, wherein at least one of the plurality of the F-Pages is of a size corresponding to a minimum unit of program for the drive controller.

34. The solid state drive controller of claim 25, wherein at least one of the plurality of L-Pages is configured to be configured by a host.

35. The solid state drive controller of claim 25, wherein at least one of the plurality of L-Pages is configured to have a size ranging from a first uncompressed size to a predetermined minimum compressed size.

36. The solid state drive controller of claim 25, wherein at least one of the plurality of physical pages comprises an error correction page (E-Page) comprising a data portion and an error correction code portion.