System and method for testing an integrated circuit

• US 9,588,171 B2
• Filed: 05/16/2012
• Issued: 03/07/2017
• Est. Priority Date: 05/16/2012
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Ilkov, Nikolay, Bakalski, Winfried
• Primary Examiner(s): Koval, Melissa
• Assistant Examiner(s): Nguyen, Trung
• Application Number:
  US13/472,666
• Publication Number:
  US 20130307576A1
• Time in Patent Office: 1,756 Days
• Field of Search: 324/500, 324/600, 324/762.02, 324/764.01, 324415-433, 324/522, 324/713, 324/76.11, 324/76.39, 327/564
• US Class Current: 1/1
• CPC Class Codes: G01R 31/2621 for testing field effect transistors, i.e. FET's
• CPC Class Codes: G01R 31/2822 of microwave or radiofrequency circuits of attenuation, gain, e.g. using network analyzers G01R27/28

Abstract

In accordance with an embodiment, a method of testing an integrated circuit, includes receiving a supply voltage on the integrated circuit via a first input pin, providing power to circuits disposed on the integrated circuit via the first input pin, comparing the supply voltage to an internally generated voltage, generating a digital output value based on the comparing, and applying the digital output value to a pin of the integrated circuit.

Claims

1. A method of testing an integrated circuit, the method comprising:

receiving a supply voltage on the integrated circuit via a first input pin;

providing power to circuits disposed on the integrated circuit via the first input pin;

comparing, by a data converter of the integrated circuit, the supply voltage to a voltage internally generated by a first circuit of the integrated circuit;

providing, by the data converter, a first output value in accordance with a voltage difference between the supply voltage and the internally generated voltage;

generating, by a digital interface of the integrated circuit, a digital output value based on the first output value; and

applying the digital output value to a pin of the integrated circuit such that the digital output value is readable in a test mode.

2. The method of claim 1, wherein comparing the supply voltage to the internally generated voltage comprises using a comparator.

3. The method of claim 1, wherein comparing the supply voltage to the internally generated voltage comprises using an analog-to digital converter.

4. The method of claim 1, wherein comparing the supply voltage to an internally generated voltage comprises dividing the supply voltage using a resistive voltage divider.

5. The method of claim 1, wherein applying the digital output value to the pin of the integrated circuit comprises transmitting the digital output value via a serial data interface.

6. The method of claim 1, wherein comparing the supply voltage to an internally generated voltage comprises comparing the supply voltage to a node of an internal voltage regulator.

7. The method of claim 6, wherein the node of the internal voltage regulator is a feedback voltage of the internal voltage regulator.

8. The method of claim 1, wherein comparing the supply voltage to an internally generated voltage comprises comparing the supply voltage to an output voltage of a charge pump.

9. The method of claim 8, wherein comparing the supply voltage to the output voltage of the charge pump comprises comparing a divided supply voltage with a divided charge pump output voltage.

10. The method of claim 1, further comprising producing the internally generated voltage based on an internal current.

11. The method of claim 10, wherein producing the internally generated voltage based on the internal current comprises converting a current between an output of an internal regulator circuit and a load of the internal regulator circuit into the internally generated voltage.

12. The method of claim 11, wherein the load of the internal regulator circuit comprises a charge pump.

13. An integrated circuit comprising:

a first circuit;

a digital interface; and

a data converter having a first input coupled to a supply voltage, a second input coupled to the first circuit, and a first output coupled to the digital interface, wherein the digital interface is readable in a test mode, and the data converter is configured to provide a value at the first output based on a voltage difference between the first input and the second input.

14. The integrated circuit of claim 13, wherein the data converter comprises a comparator.

15. The integrated circuit of claim 13, wherein the digital interface comprises a serial interface.

16. The integrated circuit of claim 13, wherein:

the first circuit comprises a voltage regulator;

the first input of the data converter is coupled to the supply voltage via a voltage divider; and

the second input of the data converter is coupled to a feedback voltage of the regulator.

17. The integrated circuit of claim 16, wherein the digital interface is configured to indicate an output state of the data converter in the test mode.

18. The integrated circuit of claim 13, wherein:

the first circuit comprises a voltage regulator;

the first input of the data converter is coupled to the supply voltage via a voltage divider;

the integrated circuit further comprises a current measuring circuit coupled in series with an output of the voltage regulator; and

the second input of the data converter is coupled to an output of the current measuring circuit.

19. The integrated circuit of claim 18, wherein the current measuring circuit comprises a differential amplifier having inputs coupled to a current measuring resistor.

20. The integrated circuit of claim 13, wherein:

the first circuit comprises a charge pump;

the first input of the data converter is coupled to the supply voltage via a first voltage divider; and

the second input of the data converter is coupled to an output of the charge pump.

21. The integrated circuit of claim 20, wherein the second input of the data converter is coupled to the output of the charge pump via a second voltage divider coupled between the supply voltage and the output of the charge pump.

22. The integrated circuit of claim 13, wherein:

the first circuit comprises a charge pump;

the first input of the data converter is coupled to the supply voltage via a first voltage divider;

the integrated circuit further comprises a current measuring circuit coupled in series with an output of the charge pump and a substrate connection of a semiconductor switch; and

the second input of the data converter is coupled to an output of the current measuring circuit.

23. An integrated circuit comprising:

a semiconductor switch;

a digital interface; and

a comparator having a first input coupled to a reference voltage, a second input coupled to a substrate connection of the semiconductor switch, and an output coupled to the digital interface, wherein the comparator is configured to provide a value at its output based on a voltage difference between the first input and the second input.

24. The integrated circuit of claim 23, wherein the reference voltage is less than or equal to a ground voltage.

25. The integrated circuit of claim 23, wherein the digital interface is configured to indicate whether a first fault condition exists based on whether the comparator indicates that a voltage of the substrate connection is greater than the reference voltage.

26. The integrated circuit of claim 25, wherein the first fault condition comprises a substrate leakage condition.

27. A method of testing an integrated circuit, the method comprising:

receiving a first supply voltage on the integrated circuit via a first input pin;

providing power to circuits disposed on the integrated circuit via the first input pin;

providing, by an internal voltage generation circuit of the integrated circuit, an internal supply voltage at an internal supply voltage terminal;

comparing the first supply voltage to the internal supply voltage using a first analog comparator configured to compare two analog voltages with each other;

generating, by a digital interface, a first digital output value based on the comparing; and

applying the first digital output value to a pin of the integrated circuit such that the first digital output value is readable in a test mode.

28. The method of claim 27, further comprising:

measuring an output current of the internal voltage generation circuit using a current measurement circuit;

comparing an output of the current measurement circuit to the first supply voltage with a second analog comparator;

generating a second digital output value based on the comparing the output of the current measuring circuit; and

applying the first digital output value to a pin of the integrated circuit.

29. The method of claim 27, further comprising

dividing the internal supply voltage using a first voltage divider to form a first divided voltage;

and

dividing the first supply voltage using a second voltage divider to form a second divided voltage, wherein comparing the first supply voltage to the internal supply voltage further comprises comparing the first divided voltage with the second divided voltage.

30. The method of claim 27, wherein the internal voltage generation circuit comprises a linear voltage regulator.

31. The method of claim 30, wherein the internal voltage generation circuit comprises a charge pump.

32. An integrated circuit comprising:

a first internal voltage generation circuit configured to produce an internal supply voltage at a first internal supply voltage terminal;

a digital interface; and

a first analog comparator having a first input coupled to a first power supply pin, a second input coupled to the first internal supply voltage terminal, and an output coupled to the digital interface, wherein the digital interface is readable in a test mode.

33. The integrated circuit of claim 32, further comprising:

a first voltage divider having an input coupled to the first power supply pin and an output coupled to the first input of the first analog comparator; and

a second voltage divider having an input coupled to the first internal supply voltage terminal and an output coupled to the second input of the first analog comparator.

34. The integrated circuit of claim 32, wherein the first internal voltage generation circuit is a linear voltage regulator.

35. The integrated circuit of claim 32, wherein the first internal voltage generation circuit is a charge pump.

36. The integrated circuit of claim 32, further comprising:

a current measurement circuit having an input coupled to the first internal supply voltage terminal, the current measurement circuit configured to measure a current supplied by the first internal voltage generation circuit; and

a second analog comparator having a first input coupled to the first power supply pin, a second input coupled an output of the current measurement circuit, and an output coupled to the digital interface.