Semiconductor device and wireless tag using the same
First Claim
1. A semiconductor device comprising:
- a memory circuit comprising a first transistor, a capacitor, and a second transistor; and
a protection circuit electrically connected to the memory circuit,wherein one of a source and a drain of the first transistor is electrically connected to one electrode of the capacitor and one of a source and a drain of the second transistor,wherein the other of the source and the drain of the first transistor is electrically connected to the other electrode of the capacitor, andwherein the second transistor comprises a semiconductor layer including indium and oxygen.
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Accused Products
Abstract
In a wireless tag with which a wireless communication system whose electric power of a carrier wave from a R/W is high, an overvoltage protection circuit is provided to prevent from generating excessive electric power in the wireless tag when the wireless tag receives excessive electric power. However, as noise is generated by operation of the overvoltage protection circuit, an error of reception occurs in receiving a signal whose modulation factor is small. To solve the problem, the maximum value of generated voltage in the wireless tag is held in a memory circuit after the overvoltage protection circuit operates, then the overvoltage protection circuit is controlled in accordance with the maximum value of generated voltage. The voltages at which the overvoltage protection circuit starts and stops operating are different from each other, and hysteresis occurs between the timing when the overvoltage protection circuit starts and stops operating.
47 Citations
18 Claims
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1. A semiconductor device comprising:
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a memory circuit comprising a first transistor, a capacitor, and a second transistor; and a protection circuit electrically connected to the memory circuit, wherein one of a source and a drain of the first transistor is electrically connected to one electrode of the capacitor and one of a source and a drain of the second transistor, wherein the other of the source and the drain of the first transistor is electrically connected to the other electrode of the capacitor, and wherein the second transistor comprises a semiconductor layer including indium and oxygen. - View Dependent Claims (2, 3, 4, 5, 11, 12, 15, 16)
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6. A semiconductor device comprising:
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a memory circuit comprising a first transistor, a capacitor, and a second transistor; and a protection circuit electrically connected to the memory circuit, the protection circuit comprising a third transistor, wherein one of a source and a drain of the first transistor is electrically connected to one electrode of the capacitor, wherein the other of the source and the drain of the first transistor is electrically connected to the other electrode of the capacitor, wherein one of a source and a drain of the second transistor is electrically connected to the one of the source and the drain of the first transistor, wherein a gate of the third transistor is electrically connected to the one electrode of the capacitor, and wherein each of the second transistor and the third transistor comprises a semiconductor layer including indium and oxygen. - View Dependent Claims (7, 8, 9, 10, 13, 14, 17, 18)
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Specification