Microelectronic assembly for microelectronic packaging with bond elements to encapsulation surface

• US 9,615,456 B2
• Filed: 07/27/2015
• Issued: 04/04/2017
• Est. Priority Date: 12/20/2012
• Status: Active Grant

• Current Assignee: Invensas Corporation
• Original Assignee: Invensas Corporation
• Inventors: Haba, Belgacem, Mohammed, Ilyas, Caskey, Terrence, Co, Reynaldo, Chau, Ellis
• Primary Examiner(s): Willis, Tremesha S
• Application Number:
  US14/809,570
• Publication Number:
  US 20150334831A1
• Time in Patent Office: 617 Days
• Field of Search: 174251, 174250, 174253, 174255, 174257-260
• CPC Class Codes: H01L 21/56 Encapsulations, e.g. encapsulation layers, coatings
• CPC Class Codes: H01L 2224/10126 Bump collar
• CPC Class Codes: H01L 2224/11334 using preformed bumps
• CPC Class Codes: H01L 2224/1134 Stud bumping, i.e. using a wire-bonding apparatus
• CPC Class Codes: H01L 2224/1191 Forming a passivation layer after forming the bump connector
• CPC Class Codes: H01L 2224/13017 being non uniform along the bump connector
• CPC Class Codes: H01L 2224/13022 the bump connector being at least partially embedded in the surface
• CPC Class Codes: H01L 2224/13076 being mutually engaged together, e.g. through inserts
• CPC Class Codes: H01L 2224/13082 Two-layer arrangements
• CPC Class Codes: H01L 2224/131 with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• CPC Class Codes: H01L 2224/13101 the principal constituent melting at a temperature of less than 400°C
• CPC Class Codes: H01L 2224/1403 Bump connectors having different sizes, e.g. different diameters, heights or widths
• CPC Class Codes: H01L 2224/14051 Bump connectors having different shapes
• CPC Class Codes: H01L 2224/14135 Covering only the peripheral area of the surface to be connected, i.e. peripheral arrangements
• CPC Class Codes: H01L 2224/16105 the bump connector connecting bonding areas being not aligned with respect to each other
• CPC Class Codes: H01L 2224/16145 the bodies being stacked
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/16227 the bump connector connecting to a bond pad of the item
• CPC Class Codes: H01L 2224/1703 Bump connectors having different sizes, e.g. different diameters, heights or widths
• CPC Class Codes: H01L 2224/17051 Bump connectors having different shapes
• CPC Class Codes: H01L 2224/32225 : the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45012 : Cross-sectional shape
• CPC Class Codes: H01L 2224/45014 : Ribbon connectors, e.g. rectangular cross-section
• CPC Class Codes: H01L 2224/45015 : being circular
• CPC Class Codes: H01L 2224/45101 : the principal constituent melting at a temperature of less than 400°C
• CPC Class Codes: H01L 2224/45124 : Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/45144 : Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/45147 : Copper (Cu) as principal constituent
• CPC Class Codes: H01L 2224/45155 : Nickel (Ni) as principal constituent
• CPC Class Codes: H01L 2224/45624 : Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/45655 : Nickel (Ni) as principal constituent
• CPC Class Codes: H01L 2224/48091 : Arched
• CPC Class Codes: H01L 2224/48227 : connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73204 : the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/73265 : Layer and wire connectors
• CPC Class Codes: H01L 2225/06513 : Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
• CPC Class Codes: H01L 2225/06517 : Bump or bump-like direct electrical connections from device to substrate
• CPC Class Codes: H01L 2225/1023 : the support being an insulating substrate
• CPC Class Codes: H01L 2225/1041 : Special adaptations for top connections of the lowermost container, e.g. redistribution layer, integral interposer
• CPC Class Codes: H01L 2225/1058 : Bump or bump-like electrical connections, e.g. balls, pillars, posts
• CPC Class Codes: H01L 23/3128 : the substrate having spherical bumps for external connection
• CPC Class Codes: H01L 23/3135 : Double encapsulation or coating and encapsulation
• CPC Class Codes: H01L 23/3157 : Partial encapsulation or coating mask layer used as insulation layer H01L21/31
• CPC Class Codes: H01L 23/49811 : Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads H01L23/49827 takes precedence
• CPC Class Codes: H01L 23/528 : Geometry or layout of the interconnection structure H01L27/0207 takes precedence; algorithms G06F30/00
• CPC Class Codes: H01L 24/13 : of an individual bump connector
• CPC Class Codes: H01L 24/14 : of a plurality of bump connectors
• CPC Class Codes: H01L 24/16 : of an individual bump connector
• CPC Class Codes: H01L 24/17 : of a plurality of bump connectors
• CPC Class Codes: H01L 24/45 : of an individual wire connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/73 : Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 25/03 : all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
• CPC Class Codes: H01L 25/0657 : Stacked arrangements of devices
• CPC Class Codes: H01L 25/105 : the devices being of a type provided for in group H01L27/00
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/15321 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/15322 : being a pin array, e.g. PGA
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19107 : off-chip wires
• CPC Class Codes: H01L 2924/206 : Length ranges
• CPC Class Codes: H05K 1/0298 : Multilayer circuits
• CPC Class Codes: H05K 1/11 : Printed elements for providing electric connections to or between printed circuits
• CPC Class Codes: H05K 1/181 : associated with surface mounted components
• CPC Class Codes: H05K 1/185 : Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit semiconductor chips encapsulated by interconnect and support structures H01L23/5389, H01L24/00
• CPC Class Codes: H05K 2201/10515 : Stacked components
• CPC Class Codes: H05K 2201/10977 : Encapsulated connections applying non-metallic protective coatings for encapsulating mounted components H05K3/284
• CPC Class Codes: Y02P 70/50 : Manufacturing or production processes characterised by the final manufactured product

Abstract

A structure may include bond elements having bases joined to conductive elements at a first portion of a first surface and end surfaces remote from the substrate. A dielectric encapsulation element may overlie and extend from the first portion and fill spaces between the bond elements to separate the bond elements from one another. The encapsulation element has a third surface facing away from the first surface. Unencapsulated portions of the bond elements are defined by at least portions of the end surfaces uncovered by the encapsulation element at the third surface. The encapsulation element at least partially defines a second portion of the first surface that is other than the first portion and has an area sized to accommodate an entire area of a microelectronic element. Some conductive elements are at the second portion and configured for connection with such microelectronic element.

Claims

1. A microelectronic assembly comprising:

a substrate having first and second oppositely facing surfaces and a plurality of electrically conductive elements at the first surface;

bond elements comprising wire bonds, the wire bonds having bases joined to respective ones of the conductive elements at a first portion of the first surface and end surfaces remote from the substrate and the bases, each of the bond elements extending from the base to the end surface thereof;

a first microelectronic element having a surface overlying the second surface and aligned in first and second directions parallel to the second surface with at least some of the bases of the bond elements; and

an encapsulation element overlying the first portion of the first surface of the substrate and filling spaces between the bond elements such that the bond elements are separated from one another by the encapsulation element, the encapsulation element having a third surface facing away from the first surface of the substrate and having an edge surface extending from the third surface towards the first surface, wherein unencapsulated portions of the bond elements are defined by at least portions of the bond elements that are uncovered by the encapsulation element at the third surface,

wherein the encapsulation element at least partially defines a second portion of the first surface, the second portion being other than the first portion of the first surface and having an area sized to accommodate an entire area of at least one second microelectronic element, wherein at least some of the conductive elements at the first surface are at the second portion and configured for connection with the at least one second microelectronic element.

2. The assembly of claim 1, wherein at least one of the bond elements extends above the third surface in a direction non-parallel to the third surface.

3. The microelectronic assembly of claim 1 wherein the first microelectronic element has a major surface and edge surfaces extending away therefrom, the first microelectronic element comprising a dielectric encapsulation layer contacting at least the edge surfaces.

4. The microelectronic assembly of claim 3, wherein the major surface of the first microelectronic element is oriented parallel to the second surface of the substrate.

5. The microelectronic assembly of claim 4, wherein the first microelectronic element has a plurality of contacts at the major surface which are electrically connected with a plurality of conductive elements at the second surface of the substrate.

6. The microelectronic assembly of claim 1, wherein the first microelectronic element has a major surface and plurality of contacts at the major surface which face and are electrically coupled with conductive elements at the second surface of the substrate, the microelectronic assembly further comprising an underfill surrounding individual electrical connections between the contacts of the first microelectronic element and the conductive elements at the second surface.

7. The microelectronic assembly of claim 1, wherein the substrate has an edge surface extending between the first and second surfaces, and the first surface of the substrate comprises a peripheral portion between the edge surface and the second portion of the first surface, at least some of the conductive elements being disposed at the peripheral portion, and at least some of the plurality of bond elements having bases coupled with the conductive elements at the peripheral portion.

8. The microelectronic assembly of claim 1, further comprising a display device electrically coupled with the microelectronic assembly.

9. A microelectronic assembly comprising:

a circuit panel having a plurality of contacts; and

a microelectronic package comprising

a substrate having first and second oppositely facing surfaces, a plurality of electrically conductive elements at the first surface, the substrate electrically coupled with the contacts of the circuit panel;

bond elements comprising wire bonds, the wire bonds having bases joined to respective ones of the conductive elements at a first portion of the first surface and end surfaces remote from the substrate and the bases, each of the bond elements extending from the base to the end surface thereof; and

an encapsulation element overlying the first portion of the first surface of the substrate and filling spaces between the bond elements such that the bond elements are separated from one another by the encapsulation element, the encapsulation element having a third surface facing away from the first surface of the substrate and having an edge surface extending from the third surface towards the first surface, wherein unencapsulated portions of the bond elements are defined by at least portions of the bond elements that are uncovered by the encapsulation element at the third surface;

wherein the encapsulation element at least partially defines a second portion of the first surface, the second portion being other than the first portion of the first surface and having an area sized to accommodate an entire area of a microelectronic element;

the microelectronic assembly further comprising the microelectronic element, wherein at least some of the conductive elements are at the first surface and are electrically coupled with the microelectronic element.

10. The microelectronic assembly of claim 9, wherein the terminals are at the second surface of the substrate and the contacts are at a major surface of the substrate, the terminals facing and joined with the contacts.

11. The microelectronic assembly of claim 10, wherein the first surface of the substrate faces a major surface of the circuit panel, at least some of the contacts are at the major surface of the circuit panel, and electrically conductive features of the substrate are electrically coupled with the contacts of the circuit panel through at least some of the bond elements.

12. The microelectronic assembly of claim 11, further comprising at least one additional microelectronic element overlying the second surface of the substrate and electrically coupled with the substrate.

13. The microelectronic assembly of claim 10, wherein the second portion is sized to accommodate a process of placing and electrically interconnecting the microelectronic element with the electrically conductive elements at the first surface of the substrate.

14. A microelectronic assembly comprising:

a substrate having first and second oppositely facing surfaces and a plurality of electrically conductive elements at the first surface;

a first microelectronic element having a surface overlying the second surface and electrically coupled with the substrate,

bond elements comprising wire bonds, the wire bonds having bases joined to respective ones of the conductive elements at a first portion of the first surface and end surfaces remote from the substrate and the bases, each bond element extending from the base to the end surface thereof, wherein the bases of at least some of the bond elements are aligned with the surface of the first microelectronic element in first and second directions parallel to the first surface;

an encapsulation element extending above the first portion of the first surface of the substrate and filling spaces between the bond elements such that the bond elements are separated from one another by the encapsulation element, the encapsulation element having a third surface facing away from the first surface of the substrate and having an edge surface extending from the third surface towards the first surface, wherein unencapsulated portions of the bond elements are defined by at least portions of the bond elements that are uncovered by the encapsulation element at the third surface,

wherein the first surface of the substrate further comprises second and third portions uncovered by the encapsulation element, the second and third portions sized to accommodate entire areas of second and third microelectronic elements, and pluralities of conductive elements at the second and third portions configured for electrical connection with the second and third microelectronic elements, respectively.

15. The microelectronic assembly of claim 14, wherein the second and third portions are sized to accommodate a process of placing and electrically interconnecting the second and third microelectronic elements with the conductive elements, respectively.

16. The microelectronic assembly of claim 14, further comprising the second and third microelectronic elements having surfaces overlying the second and third portions, respectively, and the second and third microelectronic elements electrically connected with the substrate at the second and third portions, respectively, wherein at least some of the bond elements have bases joined to the substrate at locations between the second and third portions.

17. The microelectronic assembly of claim 14 wherein the first microelectronic element has a major surface and edge surfaces extending away therefrom, the first microelectronic element comprising a dielectric encapsulation layer mechanically coupled with at least the edge surfaces.

18. The microelectronic assembly of claim 17, wherein the major surface of the first microelectronic element is oriented parallel to the second surface of the substrate.

19. The microelectronic assembly of claim 18, wherein the first microelectronic element has a plurality of contacts at the major surface which are electrically connected with a plurality of second conductive elements at the second surface of the substrate.

20. The microelectronic assembly of claim 14, wherein contacts at a major surface of the first microelectronic element face and are electrically coupled with a plurality of second conductive elements at the second surface of the substrate, the microelectronic assembly further comprising an underfill surrounding individual electrical connections between the first microelectronic element and the substrate.