Contact for semiconductor fabrication

  • US 9,634,013 B2
  • Filed: 10/16/2014
  • Issued: 04/25/2017
  • Est. Priority Date: 10/16/2014
  • Status: Active Grant
First Claim
Patent Images

1. A semiconductor device comprising:

  • a substrate;

    a fin structure on the substrate, the fin structure comprising a doped region;

    a first gate over the fin structure, the first gate positioned adjacent the doped region, the first gate having a spacer on a first side and having no spacer on a second side between the gate and the doped region, the first gate including a gate dielectric layer disposed over the fin structure and a gate electrode disposed over the gate dielectric layer and physically contacting the gate dielectric layer, the gate dielectric layer extending along opposing sidewalls of the gate electrode towards a top of the first gate without extending to the top of the first gate on the second side of the first gate; and

    a conductive plug that physically contacts the doped region, the gate dielectric layer, one of the sidewalls of the gate electrode and the top of the first gate.

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