Image sensor and driving method thereof

• US 9,698,184 B2
• Filed: 07/23/2015
• Issued: 07/04/2017
• Est. Priority Date: 07/23/2014
• Status: Active Grant

• Current Assignee: Tianma Microelectronics Company Limited
• Original Assignee: NLT Technologies, Ltd.
• Inventors: Sekine, Hiroyuki
• Primary Examiner(s): Makiya, David J
• Assistant Examiner(s): Jo, Taeho
• Application Number:
  US14/806,833
• Publication Number:
  US 20160027827A1
• Time in Patent Office: 712 Days
• Field of Search: 250370
• CPC Class Codes: H01L 27/14612 involving a transistor
• CPC Class Codes: H01L 27/14614 having a special gate structure
• CPC Class Codes: H01L 27/14632 Wafer-level processed structures
• CPC Class Codes: H01L 27/14636 Interconnect structures
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H01L 27/14658 X-ray, gamma-ray or corpuscular radiation imagers measuring X-, gamma- or corpuscular radiation G01T1/00
• CPC Class Codes: H01L 27/14659 Direct radiation imagers structures
• CPC Class Codes: H01L 27/14663 Indirect radiation imagers, e.g. using luminescent members
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/78663 Amorphous silicon transistors
• CPC Class Codes: H01L 29/78669 with inverted-type structure, e.g. with bottom gate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous
• CPC Class Codes: H04N 25/75 Circuitry for providing, modifying or processing image signals from the pixel array

Abstract

With an image sensor in which the amplifier circuit is disposed at each pixel, there is such an issue that the threshold voltage of the transistor fluctuates so that the signal voltage fluctuates because a voltage is continuously applied between the source and the gate of the transistor at all times when using the amorphous thin film semiconductor as the transistor that constitutes an amplifier circuit. The gate-source potential of the TFT that constitutes the amplifier circuit is controlled so that the gate terminal voltage becomes smaller than the source terminal voltage in an integrating period where the pixels accumulate the signals, and controlled so that the gate terminal voltage becomes larger than the source terminal voltage in a readout period where the pixels output the signals.

Claims

1. An image sensor, comprising:

a photodiode, a first thin film transistor (TFT), and a second TFT provided at each pixel, wherein;

one of terminals of the photodiode is connected to a gate terminal of the first TFT and a source terminal of the second TFT, and other terminal is connected to a first control signal line,

a drain terminal of the first TFT is connected to a first power source line, and a source terminal of the first TFT is connected to an output signal line,

a gate terminal of the second TFT is connected to a second control signal line, and a drain terminal of the second TFT is connected to a second power source line,

the first TFT and the second TFT are formed with an inverted staggered structure, a top contact structure, or a bottom contact structure,

in the first TFT, a two-dimensionally overlapping area of a source electrode and a gate electrode is smaller than a two-dimensionally overlapping area of a drain electrode and the gate electrode,

the first TFT includes a curve part in a first border line between a drain region connected to the first power source line via the drain terminal and a channel region and in a second border line between a source region connected to the output signal line via the source terminal and the channel region, and

a length of the first border line is longer than a length of the second border line.

2. The image sensor as claimed in claim 1, wherein the first and second TFTs are formed with an amorphous silicon or an oxide semiconductor.

3. The image sensor as claimed in claim 1, wherein:

a driving period of the image sensor is divided into an integrating period where a light signal is irradiated to the pixels and a readout period where a signal is read out from the pixels,

a gate voltage of the first TFT is set to be smaller than a source voltage of the first TFT in the integrating period, and

the gate voltage of the first TFT is set to be larger than the source voltage of the first TFT in the readout period.